06 | Keysight | M3202A PXIe Arbitrary Waveform Generator with Optional Real-Time Sequencing and FPGA Programming - Data Sheet
I/O specifications
M3202A-CH2
Typ
M3202A-CH4
Typ
Parameter
Min
Max
Min
Max Units
Comments
Output channels
Sampling rate1
Output frequency
Output voltage
Source impedance
Reference clock output
Frequency
400
DC
1000
400
1.5
400
DC
1000 MSa/s
400 MHz
Limited by a reconstruction filter
–1.5
–1.5
1.5
Vp
On a 50 Ω load
50
50
Ω
10 or 100
10 or 100
MHz
mVpp
dBm
Ω
Generated from the internal clock, user selectable
Voltage
800
2
800
2
On a 50 Ω load
On a 50 Ω load
AC coupled
Power
Source impedance
External I/O trigger/marker
VIH
50
50
2
0
5
2
0
5
V
VIL
0.8
3.3
0.5
0.8
3.3
0.5
V
VOH
2.4
0
2.4
0
V
On a high Z load
On a high Z load
VOL
V
Input impedance
Source impedance
Speed
10
10
K Ω
–
TTL
100
TTL
100
MHz
1. (-CLV) option: 400 MSa/s to 1GSa/s; (-CLF) option: fixed 1 GSa/s
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