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86115D-104 参数 Datasheet PDF下载

86115D-104图片预览
型号: 86115D-104
PDF下载: 下载PDF文件 查看货源
内容描述: [Wide-Bandwidth Oscilloscope Mainframe and Modules]
分类和应用:
文件页数/大小: 37 页 / 3203 K
品牌: KEYSIGHT [ Keysight Technologies ]
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24 | Keysight | Infiniium DCA-X 86100D Wide-Bandwidth Oscilloscope Mainframe and Modules - Data Sheet  
Modules Specifications (Continued)  
Clock recovery (Continued)  
Clock recovery modules (Continued)  
Electrical through-path digital amplitude  
attenuation 5  
83496B-100  
7.5 dB  
83496B-101  
No electrical data output signal path  
Wavelength range  
830 to 860 nm and 1260 to 1360 nm multimode  
1260 to 1360 nm and 1490 to 1600 nm single mode  
Electrical: 150 m Vpp  
Front panel recovered clock output amplitude 1 Vpp max, 220 mVpp min, 300 mVpp  
Consecutive identical digits (CID)  
Front panel recovered clock output divide  
ratio (user selectable) 6  
150 max  
N=1 to 16 at data rates 50 Mb/s to 7.1 Gb/s  
N=2 to 16 at data rates 7.1 to 14.2 Gb/s  
3.5 mm male  
Data input/output connectors  
FC/PC7 9/125 μm single-mode optical  
FC/PC7 62.5/125 μm multimode optical  
3.5 mm male electrical (input only)  
Front panel recovered clock output connector SMA  
1. To convert from OMA to average power with an extinction ratio of 8.2 dB use: PavgdBm = OMAdBm –1.68 dB.  
2. Verified with PRBS7 pattern, electrical inputs > 150 mVp-p and optical inputs > 3 dB above specification for minimum input level to acquire lock. Output  
jitter verification results of the 83496B can be affected by jitter on the input test signal. The 83496B will track jitter frequencies inside the loop bandwidth,  
and the jitter will appear on the recovered clock output. Vertical noise (such as laser RIN) on the input signal will be converted to jitter by the limit amplifier  
stage on the input of the clock recovery. These effects can be reduced by lowering the loop bandwidth setting.  
3. At rates below 1 Gb/s, loop bandwidth is fixed at 30 kHz when Option 300 is not installed.  
4. Without Option 200 loop bandwidth is adjustable from 15 kHz to 6 MHz. Available loop bandwidth settings also depend on the data rate of the input signal.  
For transition density from 0.25 to 1, the Loop Bandwidth vs Rate chart shows available loop bandwidth settings. Higher loop bandwidths can be achieved  
when average data transition density is maintained at or above 50%.  
5. 20*log(Vampout/Vampin) measured with PRBS23 at 14.2 Gb/s.  
6. Minimum frequency of divided front panel clock output is 25 MHz.  
7. Other types of optical connectors are also available.  
Selectable Loop Bandwidth vs Rate  
for 0.25 ≤ Transition Density ≤ 1  
10.0E+6  
1.0E+6  
min  
max  
100.0E+3  
10.0E+3  
10.0E+6  
100.0E+6  
1.0E+9  
10.0E+9  
100.0E+9  
Input Data Rate (bits/s)  
Typical System Configurations  
86100D Infiniium DCA-X Mainframe  
86100D hardware options  
Trigger Options (select one only):  
86100D software options (select any):  
061/062 – Add matlab analysis package  
STR – Standard – for basic eye measurements only  
ETR – Enhanced – for pattern waveforms, jitter analysis  
and some TDR applications  
200 – Enhanced jitter analysis  
201 – Advanced waveform analysis  
202 – Enhanced Impedance and S-Parameters  
300 – Advanced amplitude analysis/RIN/Q-scale  
500 – Productivity package  
PTB – Integrated precision timebase for low residual jitter  
Remote Connection Options (select one only):  
GPI – GPIB card interface installed  
GPN – No GPIB card  
SIM – InfiniiSim-DCA de-embedding/embedding  
86100DU – 400 PLL and jitter spectrum analysis  
86100D – 401 advanced eye analysis (Jitter on PRBS31)  
DCA plug-in modules (for typical 1 applications)  
Electrical/PLL  
1 to 12 Gb/s  
Electrical/PLL  
1 to 16/32 Gb/s  
Electrical  
20, 40 Gb/s  
Optical  
1 to 12Gb/s  
Optical  
20, 40 Gb/s  
TDR/TDT  
Single-ended, differential  
(high performance)  
(high performance)  
86112A  
86105C  
9 GHz optical channel  
20 GHz electrical channel  
86105D-281  
34 GHz optical channel  
(780 to 1630 nm)  
54754A  
Dual channels  
86108B  
Dual channels  
BW > 35/50 GHz  
with integrated precision  
timebase & clock recovery  
86118A  
Dual remote heads  
BW > 70 GHz each  
Dual 18 GHz channels  
BW > 20 GHz each  
N1055A  
2 or 4 channels  
83496B  
Electrical clock recovery  
(#100, 200, 300)  
86116C  
65 GHz optical channel  
80 GHz electrical channel  
86107A or  
35 or 50 GHz channels  
Note - TDR/TDT modules  
also perform as  
86100D-PTB  
precision timebase  
(#40)  
86107A (#40) or  
86100D-PTB  
precision timebase  
electrical-only receivers  
1. Contact your local Keysight sales representative to help configure a system for your specific application.  
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