IRFR/U5410
2000
1600
1200
800
400
0
20
15
10
5
V
C
C
C
= 0V,
f = 1MHz
I
D
= -8.4A
GS
iss
rss
oss
V
V
V
=-80V
=-50V
=-20V
DS
DS
DS
= C + C
,
C
SHORTED
gs
gd
ds
= C
gd
= C + C
ds
gd
C
iss
C
oss
C
rss
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
0
10
20
30
40
50
60
1
10
100
Q , Total Gate Charge (nC)
-V , Drain-to-Source Voltage (V)
G
DS
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
100
10
100
10
1
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
°
T = 150 C
J
10us
°
T = 25 C
J
100us
1ms
°
T = 25 C
C
J
°
T = 150 C
V
= 0 V
GS
Single Pulse
10ms
100
0.1
0.2
1
0.8
1.4
2.0
2.6
1
10
1000
-V ,Source-to-Drain Voltage (V)
SD
-V , Drain-to-Source Voltage (V)
DS
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
4 / 10
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