King Billion Electronics Co., Ltd.
HE89C21
駿 億 電 子 股 份 有 限 公 司
HE80000 SERIES
VDD
VDD
DOUT
Q
LATCH
Q'
MO_?PP
PAD
DIN
SCHMIDT Trigger input
10. Timer1
The Timer1 consists of two 8-bit write-only preload registers T1H and T1L and 16-bit down counter. If
Timer1 is enabled, the counter will decrement by one with each incoming clock pulse. Timer1 interrupt
will be generated when the counter underflows - counts down to FFFFH. And the counter will be
automatically reloaded with the value of T1H and T1L.
The clock source of Timer1 is derived from slow clock “SCK” at dual clock or slow clock only mode.
And it comes from the fast clock “FCK” at fast clock only mode.
Please note that the interrupt is generated when counter counts from 0000H to FFFFH. If the value of
T1H and T1L is N, and count down to FFFFH, the total count is N+1. The content of counter is zero
when system resets. Once it is enabled to count at this moment, interrupt will be generated immediately
and value of T1H and T1L will be loaded since it counts to FFFFH. So the T1H and T1L value should be
set before enabling Timer1.
January 20, 2003
9
V1.0E