Absolute hollow shaft encoders
BFF/BFG
SSI
output circuits
SSI-output
encoder
circuit
schematic
+Vs
24C clock input
typical
user
interface
+Vs
DC
DC
encoder
circuit
schematic
+Vs
typical
user
interface
+Vs
6N137
Data
e.g. MC 3487 D
SN 75153
100
Ω
91
Ω
Clock
91
Ω
100
Ω
1 nF
100
Ω
1 nF
0V
0V
e.g. MC 3489
SN 75175
AM 26 LS 32A
0V
0V
forward/reverse signal input
+V
S
12k
Ω
1.2k
Ω
0V
F/R*
output option
function of the SSI
In the stand-by mode, both clock and data signals are HIGH.
The actual measuring value is stored during the first falling
edge. The data transmission takes place with the first rising
edge, starting with MSB. It needs n+1 rising edges to transmit
the data word completely. After the last positive edge has
passed, the data output stays in a LOW condition, until the
angle measuring device is ready for a new transmission cycle.
n clock
t1
clock
T
t3
data
t2
Bit n Bit n-1
Bit 3
Bit 2
Bit 1
pulse times:
T = 1
µs
to 10
µs
/ t1 = 0.5 to 5
µs
t2 < 0.2
µs
/ t3 > 12
µs
to 25
µs
2. 22
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