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IS61LV25616AL-12T-TR 参数 Datasheet PDF下载

IS61LV25616AL-12T-TR图片预览
型号: IS61LV25616AL-12T-TR
PDF下载: 下载PDF文件 查看货源
内容描述: [Standard SRAM, 256KX16, 12ns, CMOS, PDSO44,]
分类和应用:
文件页数/大小: 12 页 / 68 K
品牌: ISSI [ INTEGRATED SILICON SOLUTION, INC ]
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IS61LV25616AL
ISSI
-10
Min. Max.
10
2
0
0
3
0
0
0
10
10
4
4
4
4
3
10
-12
Min. Max.
12
2
0
0
3
0
0
0
12
12
5
5
6
5
4
12
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
®
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
Symbol
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE
Access Time
OE
Access Time
OE
to High-Z Output
OE
to Low-Z Output
CE
to High-Z Output
CE
to Low-Z Output
LB, UB
Access Time
LB, UB
to High-Z Output
LB, UB
to Low-Z Output
Power Up Time
Power Down Time
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
HZOE
(2)
t
LZOE
(2)
t
HZCE
(2
t
LZCE
(2)
t
BA
t
HZB
(2)
t
LZB
(2)
t
PU
t
PD
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels
of 0V to 3.0V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage.
AC TEST LOADS
319
3.3V
319
3.3V
OUTPUT
30 pF
Including
jig and
scope
353
OUTPUT
5 pF
Including
jig and
scope
353
Figure 1
Figure 2
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing and Reference Level
Output Load
6
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. A
02/21/03