IC61C1024
IC61C1024L
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
Symbol
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE1
Access Time
CE2 Access Time
OE
Access Time
-12
(2)
Min. Max.
12
—
3
—
—
—
0
0
2
2
0
0
—
—
12
—
12
12
6
—
6
—
—
7
—
12
-15 ns
Min. Max.
15
—
3
—
—
—
0
0
2
2
0
0
—
—
15
—
15
15
7
—
6
—
—
8
—
12
-20 ns
Min. Max.
20
—
3
—
—
—
0
0
3
3
0
0
—
—
20
—
20
20
9
—
7
—
—
9
—
18
-25 ns
Min. Max.
25
—
3
—
—
—
0
0
3
3
0
0
—
—
25
—
25
25
9
—
10
—
—
10
—
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
RC
t
AA
t
OHA
t
ACE
1
t
ACE
2
t
DOE
t
LZOE
(3)
OE
to Low-Z Output
t
HZOE
(3)
OE
to High-Z Output
t
LZCE
1
(3)
CE1
to Low-Z Output
t
LZCE
2
(3)
CE2 to Low-Z Output
t
HZCE
(3)
CE1
or CE2 to High-Z Output
t
PU
(4)
t
PD
(4)
CE1
or CE2 to Power-Up
CE1
or CE2 to Power-Down
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1.
2. -12 ns device for IC61C1024 only.
3. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
4. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
AC TEST LOADS
480
Ω
5V
480
Ω
5V
OUTPUT
30 pF
Including
jig and
scope
255
Ω
OUTPUT
5 pF
Including
jig and
scope
255
Ω
Figure 1
6
Figure 2
Integrated Circuit Solution Inc.
AHSR008-0B 10/18/2001
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
