IS42S83200B, IS42S16160B
READ WITHOUT AUTO PRECHARGE
T0
T1
T2
T3
T4
T5
T6
T7
T8
tCK
t
CL
tCH
CLK
CKE
t
CKS tCKH
tCMS tCMH
COMMAND
ACTIVE
NOP
READ
NOP
NOP
NOP
PRECHARGE
ALL BANKS
NOP
ACTIVE
t
CMS
t
CMH
DQM/DQML
DQMH
t
t
t
AS
tAH
COLUMN m(2)
A0-A9, A11, A12
A10
ROW
ROW
ROW
BANK
AS
t
AH
ROW
AS
t
AH
DISABLE AUTO PRECHARGE
SINGLE BANK
BANK
BA0, BA1
DQ
BANK
BANK
t
AC
t
AC
t
AC
t
AC
tHZ
DOUT
m
DOUT m+1
D
OUT m+2
DOUT m+3
t
LZ
tOH
tOH
t
OH
tOH
tRCD
tRAS
t
RC
CAS Latency
DON'T CARE
UNDEFINED
t
RP
Notes:
1) CAS latency = 2, Burst Length = 4
2) x16: A9, A11, A12 = "Don't Care"
x8: A11 and A12 = "Don't Care"
54
Integrated Silicon Solution, Inc. — www.issi.com
Rev. D
07/28/08