IS42S83200B, IS42S16160B
ALTERNATING BANK READ ACCESSES
T0
T1
T2
T3
T4
T5
T6
T7
T8
tCK
t
CL
tCH
CLK
CKE
tCKS tCKH
t
CMS
tCMH
COMMAND
ACTIVE
NOP
READ
NOP
ACTIVE
NOP
READ
NOP
ACTIVE
t
CMS tCMH
DQM/
DQML, DQMH
t
t
t
AS
tAH
COLUMN m(2)
ROW
ROW
COLUMN b(2)
ROW
ROW
A0-A9, A11, A12
A10
ROW
AS
tAH
ENABLE AUTO PRECHARGE
ENABLE AUTO PRECHARGE
ROW
AS
tAH
BANK 0
BANK 3
BANK 3
BANK 0
BA0, BA1
BANK 0
t
LZ
t
OH
t
OH
tOH
t
OH
t
OH
DQ
DOUT
m
D
OUT m+
1
D
OUT m+
2
D
OUT m+
3
DOUT
b
t
AC
tAC
tAC
tAC
tAC
t
AC
t
t
t
t
RCD - BANK 0
CAS Latency - BANK 0
t
RP - BANK 0
tRCD - BANK 0
RRD
tRCD - BANK 3
CAS Latency - BANK 3
RAS - BANK 0
RC - BANK 0
DON'T CARE
Notes:
1) CAS latency = 2, Burst Length = 4
2) x16: A9, A11, and A12 = "Don't Care"
x8: A11 and A12 = "Don't Care"
34
Integrated Silicon Solution, Inc. — www.issi.com
Rev. D
07/28/08
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
