IC41SV4105
FUNCTIONAL BLOCK DIAGRAM
OE
WE
WE
CONTROL
LOGICS
OE
CONTROL
LOGIC
CAS
CONTROL
LOGIC
CAS
CAS
WE
DATA I/O BUS
RAS
CLOCK
RAS
GENERATOR
COLUMN DECODERS
SENSE AMPLIFIERS
REFRESH
COUNTER
I/O0-I/O3
MEMORY ARRAY
1,048,576 x 4
ADDRESS
BUFFERS
A0-A9
TRUTH TABLE
Function
Standby
Read
RAS
CAS
WE
X
OE
X
Address tR/tC I/O
H
L
L
L
H
L
L
L
X
High-Z
H
L
ROW/COL
ROW/COL
ROW/COL
DOUT
Write: Word (Early Write)
Read-Write
L
X
DIN
H→L
L→H
DOUT, DIN
Hidden Refresh
Read
L→H→L
L→H→L
L
L
H
L
L
X
ROW/COL
ROW/COL
DOUT
DIN
Write(1)
RAS-Only Refresh
CBR Refresh
L
H
L
X
X
X
X
ROW/NA
X
High-Z
High-Z
H→L
Note:
1. EARLY WRITE only.
Integrated Circuit Solution Inc.
3
DR032-0A 10/29/2001
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
