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IC41LV16256-35KI 参数 Datasheet PDF下载

IC41LV16256-35KI图片预览
型号: IC41LV16256-35KI
PDF下载: 下载PDF文件 查看货源
内容描述: [EDO DRAM, 256KX16, 35ns, CMOS, PDSO40, 0.400 INCH, SOJ-40]
分类和应用: 动态存储器光电二极管
文件页数/大小: 21 页 / 209 K
品牌: ISSI [ INTEGRATED SILICON SOLUTION, INC ]
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IC41C16256  
IC41LV16256  
AC CHARACTERISTICS(1,2,3,4,5,6)  
(Recommended Operating Conditions unless otherwise noted.)  
-25  
-35  
-50  
-60  
Symbol  
Parameter  
Min. Max. Min. Max.  
Min. Max. Min. Max. Units  
tRC  
Random READ or WRITE Cycle Time  
45  
25  
8
60  
35  
10  
18  
90  
50  
14  
25  
110  
60  
15  
30  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
(6, 7)  
tRAC  
tCAC  
tAA  
Access Time from RAS  
(6, 8, 15)  
Access Time from CAS  
Access Time from Column-Address(6)  
RAS Pulse Width  
12  
tRAS  
tRP  
tCAS  
tCP  
tCSH  
tRCD  
tASR  
tRAH  
tASC  
tCAH  
tAR  
25 10K  
35 10K  
50 10K  
60 10K  
RAS Precharge Time  
15  
4
4
10K  
20  
6
5
10K  
30  
8
8
10K  
40  
CAS Pulse Width(26)  
10 10K  
CAS Precharge Time(9, 25)  
CAS Hold Time (21)  
10  
60  
20  
0
10  
0
45  
25  
10  
0
35  
11  
0
50  
19  
0
RAS to CAS Delay Time(10, 20)  
Row-Address Setup Time  
Row-Address Hold Time  
Column-Address Setup Time(20)  
Column-Address Hold Time(20)  
17  
28  
36  
6
6
8
0
0
0
5
6
8
10  
40  
Column-Address Hold Time  
19  
30  
40  
(referenced to RAS)  
tRAD  
tRAL  
tRPC  
tRSH  
tCLZ  
tCRP  
tOD  
RAS to Column-Address Delay Time(11)  
Column-Address to RAS Lead Time  
RAS to CAS Precharge Time  
RAS Hold Time(27)  
8
12  
0
20  
12  
8
10  
18  
0
20  
12  
10  
14  
25  
0
25  
12  
15  
15  
30  
0
15  
3
5
3
10  
10  
5
30  
12  
15  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
7
8
14  
3
CAS to Output in Low-Z(15, 29)  
CAS to RAS Precharge Time(21)  
Output Disable Time(19, 28, 29)  
3
3
5
5
5
2
3
3
tOE  
Output Enable Time(15, 16)  
0
0
0
tOEHC  
tOEP  
tOES  
tRCS  
tRRH  
OE HIGH Hold Time from CAS HIGH  
10  
10  
5
10  
10  
5
10  
10  
5
OE HIGH Pulse Width  
OE LOW to CAS HIGH Setup Time  
Read Command Setup Time(17, 20)  
Read Command Hold Time  
0
0
0
0
0
0
0
0
(referenced to RAS)(12)  
tRCH  
Read Command Hold Time  
0
0
0
0
ns  
(referenced to CAS)(12, 17, 21)  
tWCH  
tWCR  
Write Command Hold Time(17, 27)  
5
19  
5
30  
8
40  
10  
50  
ns  
ns  
Write Command Hold Time  
(referenced to RAS)(17)  
tWP  
Write Command Pulse Width(17)  
5
10  
7
5
0
19  
5
10  
8
8
0
30  
8
10  
10  
15  
15  
0
ns  
ns  
ns  
ns  
ns  
ns  
tWPZ  
tRWL  
tCWL  
tWCS  
tDHR  
WE Pulse Widths to Disable Outputs  
Write Command to RAS Lead Time(17)  
Write Command to CAS Lead Time(17, 21)  
Write Command Setup Time(14, 17, 20)  
Data-in Hold Time (referenced to RAS)  
10  
14  
14  
0
40  
40  
8
Integrated Circuit Solution Inc.  
DR018-0C 04/23/2004