IC41C16256
IC41LV16256
AC WAVEFORMS
READ CYCLE (With WE-Controlled Disable)
RAS
tCSH
tCRP
tRCD
tCP
tCAS
UCAS/LCAS
tAR
tRAD
tASR
tRAH
tCAH
tRCH
tASC
tWPZ
tASC
ADDRESS
WE
Row
Column
Column
tRCS
tRCS
tAA
tRAC
tCAC
tCLZ
tWHZ
tCLZ
Open
Open
Valid Data
I/O
OE
tOE
tOD
Undefined
Don’t Care
RAS-ONLY REFRESH CYCLE (OE, WE = DON'T CARE)
t
RC
t
RAS
tRP
RAS
t
CRP
t
RPC
UCAS/LCAS
t
ASR
tRAH
ADDRESS
I/O
Row
Row
Open
Don’t Care
18
Integrated Circuit Solution Inc.
DR018-0C 04/23/2004