AS7C3364NTD32B
AS7C3364NTD36B
®
Timing characteristics over operating range
-200
-166
-133
1
Parameter
Clock frequency
Sym
Min Max Min Max Min Max
Unit
MHz
ns
Notes
f
–
200
–
-
166
-
133
MAX
Cycle time
t
5
6
-
7.5
-
-
CYC
Clock access time
t
–
3.0
3.0
–
-
3.5
4.0
ns
CD
Output enable Low to data valid
Clock High to output Low Z
Data output invalid from clock High
Output enable Low to output Low Z
Output enable High to output High Z
Clock High to output High Z
Clock High to output High Z
Clock High pulse width
t
–
-
3.5
-
4.0
ns
OE
t
0
0
-
0
-
ns
2,3,4
LZC
t
1.5
0
–
1.5
0
-
1.5
0
-
ns
4
OH
t
–
-
-
ns
2,3,4
LZOE
HZOE
t
–
3.0
3.0
1.5
–
-
3.5
-
4.0
ns
2,3,4
t
–
-
3.5
-
4.0
ns
2,3,4
5
HZC
t
–
-
1.5
-
-
2.0
-
ns
HZCN
t
2.0
2.3
1.4
1.4
1.4
1.4
1.4
1.4
0.4
0.4
0.4
0.4
0.4
0.4
2.4
2.4
1.5
1.5
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
0.5
2.5
2.5
1.5
1.5
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
0.5
ns
6
CH
Clock Low pulse width
t
t
t
–
-
-
ns
6
CL
AS
DS
Address setup to clock High
Data setup to clock High
–
-
-
ns
7
–
-
-
ns
7
Write setup to clock High
t
–
-
-
ns
7
WS
Chip select setup to clock High
Clock enable setup to clock High
ADV/LD setup to clock High
Address hold from clock High
Data hold from clock High
Write hold from clock High
ADV/LD hold from clock High
Clock enable hold from clock High
Chip select hold from clock High
t
–
-
-
ns
7
CSS
t
–
-
-
ns
7
CENS
ADVS
t
–
-
-
ns
7
t
t
–
-
-
ns
7
AH
DH
–
-
-
ns
7
t
–
-
-
ns
7
WH
t
–
-
-
ns
7
ADVH
t
–
-
-
ns
7
CENH
t
–
-
-
ns
7
CSH
1 See “Notes” on page 15.
Snooze Mode Electrical Characteristics
Description
Conditions
Symbol
Min
Max
Units
Current during Snooze Mode
ZZ active to input ignored
ZZ > V
I
30
mA
IH
SB2
PDS
PUS
t
t
2
2
cycle
cycle
cycle
cycle
ZZ inactive to input sampled
ZZ active to SNOOZE current
ZZ inactive to exit SNOOZE current
t
2
ZZI
t
0
RZZI
4/28/05; v.1.3
Alliance Semiconductor
P. 9 of 19
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
