AS7C3364FT32B
AS7C3364FT36B
®
Timing waveform of read/write cycle(ADSC controlled, ADSP = HIGH)
tCYC
tCH
tCL
CLK
tADSCS
tADSCH
ADSC
tAS
tAH
A9
A10
A5
A4
A7
A8
A3
A6
A1
A2
ADDRESS
tWS
tWH
BWE
BW[a:d]
tCSS
tCSH
CE0,CE2
CE1
OE
tCD
tOE
tOH
tHZOE
tLZOE
Q(A2)
Q(A9)
Q(A1)
Q(A3)
Q(A10)
Q(A4)
Dout
Din
tDH
tDS
D(A5)
D(A6)
D(A7)
D(A8)
READ
Q(A10)
WRITE
D(A7)
READ READ READ
Q(A1) Q(A2) Q(A3)
WRITE
D(A6)
WRITE
D(A8)
READ
Q(A9)
READ
Q(A4)
WRITE
D(A5)
Note: ADV is don’t care here.
2/8/05; v.1.2
Alliance Semiconductor
P. 14 of 19