AS7C33256PFD32A
AS7C33256PFD36A
®
Write enable truth table (per byte)
Function
GWE BWE
BWa
X
BWb
X
BWc
BWd
X
L
H
H
H
H
H
X
L
L
L
H
L
X
L
Write All Bytes
L
L
L
Write Byte a
L
H
H
L
H
Write Byte c and d
H
H
L
X
X
X
H
X
Read
H
H
H
Key: X = don’t care, L = low, H = high, n = a, b, c, d; BWE, BWn = internal write signal.
Asynchronous Truth Table
Operation
Snooze mode
ZZ
H
L
OE
X
I/O Status
High-Z
L
Dout
Read
L
H
High-Z
Write
L
X
Din, High-Z
High-Z
Deselected
L
X
Burst order table
Interleaved Burst Order (LBO=1)
A1 A0 A1 A0 A1 A0 A1 A0
Linear Burst Order (LBO=0)
A1 A0 A1 A0 A1 A0 A1 A0
Starting Address
First increment
0 0
0 1
1 0
1 1
0 1
0 0
1 1
1 0
1 0
1 1
0 0
0 1
1 1
1 0
0 1
0 0
Starting Address
First increment
0 0
0 1
1 0
1 1
0 1
1 0
1 1
0 0
1 0
1 1
0 0
0 1
1 1
0 0
0 1
1 0
Second increment
Third increment
Second increment
Third increment
12/1/04, v.1.2
Alliance Semiconductor
P. 6 of 20
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
