AS7C331MPFD32A
AS7C331MPFD36A
®
Timing characteristics over operating range
–200
–166
Min
-133
Parameter
Clock frequency
Sym
fMax
tCYC
tCD
Min
Max
200
–
Max
166
–
Min
–
Max
133
–
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes1
–
–
Cycle time
5
6
7.5
–
Clock access time
–
3.1
3.1
–
–
3.5
3.5
–
3.8
3.8
–
Output enable low to data valid
Clock high to output low Z
Data output invalid from clock high
Output enable low to output low Z
Output enable high to output high Z
Clock high to output high Z
Output enable high to invalid output
Clock high pulse width
tOE
–
–
–
tLZC
tOH
0
0
0
2,3,4
2
1.5
0
–
1.5
0
–
1.5
0
–
tLZOE
tHZOE
tHZC
tOHOE
tCH
–
–
–
2,3,4
2,3,4
2,3,4
–
3.0
3.0
–
–
3.4
3.4
–
–
3.8
3.8
–
–
–
–
0
0
0
2.0
2.0
1.4
1.4
1.4
1.4
0.4
0.4
0.4
0.4
1.4
1.4
1.4
0.4
0.4
0.4
–
2.4
2.4
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
1.5
1.5
1.5
0.5
0.5
0.5
–
2.4
2.4
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
1.5
1.5
1.5
0.5
0.5
0.5
–
5
5
Clock low pulse width
tCL
–
–
–
Address setup to clock high
Data setup to clock high
tAS
–
–
–
6
tDS
–
–
–
6
Write setup to clock high
Chip select setup to clock high
Address hold from clock high
Data hold from clock high
Write hold from clock high
Chip select hold from clock high
ADV setup to clock high
ADSP setup to clock high
ADSC setup to clock high
ADV hold from clock high
ADSP hold from clock high
ADSC hold from clock high
tWS
–
–
–
6,7
6,8
6
tCSS
–
–
–
tAH
–
–
–
tDH
–
–
–
6
tWH
–
–
–
6,7
6,8
6
tCSH
tADVS
tADSPS
tADSCS
tADVH
tADSPH
tADSCH
–
–
–
–
–
–
–
–
–
6
–
–
–
6
–
–
–
6
–
–
–
6
–
–
–
6
1 See “Notes” on page 16.
Snooze Mode Electrical Characteristics
Description
Conditions
ZZ > V
Symbol
Min
Max
Units
mA
Current during Snooze Mode
ZZ active to input ignored
I
80
IH
SB2
PDS
PUS
t
t
2
2
cycle
cycle
cycle
ZZ inactive to input sampled
ZZ active to SNOOZE current
ZZ inactive to exit SNOOZE current
t
2
ZZI
t
0
RZZI
2/10/05, v.1.1
Alliance Semiconductor
10 of 19
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
