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AS7C331MFT18A-85TQCN 参数 Datasheet PDF下载

AS7C331MFT18A-85TQCN图片预览
型号: AS7C331MFT18A-85TQCN
PDF下载: 下载PDF文件 查看货源
内容描述: [Standard SRAM, 1MX18, 8.5ns, CMOS, PQFP100, 14 X 20 MM, LEAD FREE, TQFP-100]
分类和应用: 静态存储器内存集成电路
文件页数/大小: 19 页 / 512 K
品牌: ISSI [ INTEGRATED SILICON SOLUTION, INC ]
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AS7C331MFT18A
®
Write enable truth table (per byte)
Function
Write all bytes (a, b)
Write byte a
Write byte b
Read
GWE
L
H
H
H
H
H
BWE
X
L
L
L
H
L
BWa
X
L
L
H
X
H
BWb
X
L
H
L
X
H
Key:
X = don’t care; L = low; H = high; B
WE, BWn
= internal write signal
Asynchronous Truth Table
Operation
Snooze mode
Read
Write
Deselected
ZZ
H
L
L
L
L
OE
X
L
H
X
X
I/O Status
High-Z
Dout
High-Z
Din, High-Z
High-Z
Notes:
1. X means “Don’t Care”
2. ZZ pin is pulled down internally
3. For write cycles that follows read cycles, the output buffers must be disabled with OE, otherwise data bus contention will occur.
4. Snooze mode means power down state of which stand-by current does not depend on cycle times
5. Deselected means power down state of which stand-by current depends on cycle times
Burst sequence table
Interleaved burst address (LBO = 1)
A1 A0
1
st
Address
2
nd
Address
3
rd
Address
4
th
Address
Linear burst address (LBO = 0)
A1 A0
11
10
01
00
1
st
Address
2
nd
Address
3
rd
Address
4
th
Address
A1 A0
01
00
11
10
A1 A0
10
11
00
01
A1 A0
00
01
10
11
A1 A0
01
10
11
10
A1 A0
10
11
00
01
A1 A0
11
00
01
10
00
01
10
11
1/21/05, v 1.4
Alliance Semiconductor
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