AS7C25512PFD32A
AS7C25512PFD36A
®
Pin Configuration
119 BGA Top View
1
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
DDQ
NC
FT
DQC
DQC
V
DDQ
DQC
DQC
V
DDQ
DQd
DQd
V
DDQ
DQd
DQd
NC
NC
V
DDQ
2
A
A
A
DQPc
DQc
DQc
DQc
DQc
V
DD
DQd
DQd
DQd
DQd
DQpd
A
NC
TMS
3
A
A
A
V
SS
V
SS
V
SS
BWc
4
ADSP
ADSC
V
DD
NC
CE0
OE
ADV
GWE
5
A
A
A
V
SS
V
SS
V
SS
BWb
V
SS
NC
V
SS
BWd
V
DD
CLK
NC
BWE
V
SS
NC
VSS
BWa
V
SS
V
SS
V
SS
LBO
A
TDI
A1
A0
V
DD
A
TCK
V
SS
V
SS
V
SS
V
DD
A
TDO
6
A
A
A
DQpb
DQb
DQb
DQb
DQb
VDD
DQa
DQa
DQa
DQa
DQPa
A
NC
NC
7
V
DDQ
NC
NC
DQb
DQb
V
DDQ
DQb
DQb
V
DDQ
DQa
DQa
V
DDQ
DQa
DQa
NC
ZZ
V
DDQ
Note: For P/N AS7C25512PFD32A, 4 of the I/O Pins must be left open (N.C.)
10/3/01; v.0.9.1
Alliance Semiconductor
2 of 2
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