®
ISSI
IS61SP6464
SNOOZE AND RECOVERY CYCLE SWITCHING CHARACTERISTICS (Over Operating Range)
-117MHz
-100MHz
Symbol Parameter
Min. Max.
Min. Max.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
cyc
cyc
tKC
tKH
tKL
Cycle Time
9.2
3.4
3.4
—
1.5
0
—
—
—
5
10
4
—
—
—
5
Clock High Time
Clock Low Time
4
tKQ
tKQX
Clock Access Time
—
2.5
0
(3)
Clock High to Output Invalid
Clock High to Output Low-Z
Clock High to Output High-Z
Output Enable to Output Valid
Output Disable to Output Invalid
Output Enable to Output Low-Z
Output Disable to Output High-Z
Address Setup Time
—
—
5
—
—
5
(3,4)
tKQLZ
(3,4)
tKQHZ
tOEQ
2
2
—
0
5
—
0
5
(3)
tOEQX
—
—
5
—
—
5
(3,4)
tOELZ
0
0
(3,4)
tOEHZ
tAS
2
2
2.5
2.5
2.5
0.5
0.5
0.5
2
—
—
—
—
—
—
—
—
2.5
2.5
2.5
0.5
0.5
0.5
2
—
—
—
—
—
—
—
—
tSS
Address Status Setup Time
Chip Enable Setup Time
Address Hold Time
tCES
tAH
tSH
Address Status Hold Time
Chip Enable Hold Time
ZZ Standby(1)
tCEH
tZZS
tZZREC
ZZ Recovery(2)
2
2
Notes:
1. The assertion of ZZ allows the SRAM to enter a lower power state than when deselected within the time specified. Data
retention is guaranteed when ZZ is asserted and clock remains active.
2. ADSC and ADSP must not be asserted for at least 2 cyc after leaving ZZ state.
3. Guaranteed but not 100% tested. This parameter is periodically sampled.
4. Tested with load in Figure 2.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. C
15
01/14/04
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
