SWITCHING SPECIFICATIONS AT TA = 25°C ( VCC = 5V Unless otherwise noted )
PARAMETER
PropagationDelayTime
to Logic Low at Output
( fig 1 )( note6,8 )
SYM DEVICE
6N139
tPHL 6N139
6N138
MIN TYP MAX UNITS TESTCONDITION
5.0
0.2
1.0
25
1
10
µs
µs
µs
I =0.5mA,RL =4.7kΩ
IF = 12mA,RL = 270Ω
IFF = 1.6mA,RL = 2.2kΩ
Propagation Delay Time
to Logic High at Output
( fig 1 )( note6,8 )
6N139
tPLH 6N139
6N138
1.0
1.0
4.0
60
7
35
µs
µs
µs
I = 0.5mA,R = 4.7kΩ
IF = 12mA,RLL= 270Ω
IFF = 1.6mA,RL = 2.2kΩ
Common Mode Transient
Immunity at Logic High
Level Output ( fig 2 )( note9 )
CMH
CML
1000 10000
1000 10000
V/µs
V/µs
IF = 0mA, VCM = 10VPP
RL = 2.2kΩ
Common Mode Transient
Immunity at Logic Low
Level Output ( fig 2 )( note9 )
IF=1.6mA,V =10VPP
RL = 2.2kΩCM
NOTES:-
1.
2.
3.
4.
5.
Derate linearly above 50oC free air temperature at a rate of 0.4 mA/°C.
Derate linearly above 50oC free air temperature at a rate of 0.7 mW/°C.
Derate linearly above 25oC free air temperature at a rate of 0.7 mA/°C.
Derate linearly above 25oC free air temperature at a rate of 2.0 mW/°C.
CURRENT TRANSFER RATIO is defined as the ratio of output collector current,IO , to the forward LED
input current, IF multiplied by 100%.
6.
7.
Pin 7 open.
Device considered a two-terminal device: pins 1,2,3, and 4 shorted together and pins 5,6,7 and 8 shorted
together.
8.
9.
Use of a resistor between pin 5 and 7 will decrease gain and delay time.
Common mode transient immunity in Logic High level is the maximum tolerable (positive) dVcm/dt on
the leading edge of the common mode pulse VCM to assure that the output will remain in a Logic High
state (i.e. VO > 2.0V). Common mode transient immunity in Logic Low level is the maximum tolerable
(negative) dVcm/dt on the trailing edge of the common mode pulse signal, VCM to assure that the output
willremaininLogicLowstate(i.e.VO<0.8V).
FIG.1 SWITCHING TEST CIRCUIT
PULSE
GENERATOR
ZO = 50Ω
tr = 5ns
IF
IF
0
1
8
5V
VO
10% Duty Cycle
1/f < 100µs
VO
5V
2
7
6
RL
1.5V
1.5V
VOL
3
4
tPHL
tPLH
5
IF Monitor
CL = 15pF
100Ω
DB91037-AAS/A3
22/5/03