IRF830AS/LPbF
10000
V
GS
, Gate-to-Source Voltage (V)
V
GS
=
C
iss
=
C
rs s
=
C
oss
=
0V,
f = 1M Hz
C
g s
+ C
g d
, C
d s
SHO RTE D
C
gd
C
ds
+ C
gd
20
I
D
= 5.0A
16
C, Capacitance (pF)
1000
V
DS
= 400V
V
DS
= 250V
V
DS
= 100V
C
iss
12
100
C
os s
8
10
4
C
rss
1
1
10
100
1000
A
0
FOR TEST CIRCUIT
SEE FIGURE 13
16
20
0
4
8
12
24
V
D S
, D ra in-to-S ource V oltage (V)
Q
G
, Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
100
100
I
SD
, Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
I
D
, Drain Current (A)
10us
10
10
T
J
= 150
°
C
100us
1ms
10ms
1
1
T
J
= 25
°
C
0.1
0.2
V
GS
= 0 V
0.4
0.6
0.8
1.0
1.2
0.1
T
C
= 25 ° C
T
J
= 150 ° C
Single Pulse
10
100
1000
10000
V
SD
,Source-to-Drain Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
4
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