IRF7105QPbF
P-Channel
VDS , Drain-to-Source Voltage ( V )
VSD , Source-to-Drain Voltage ( V )
Fig 19. Maximum Safe Operating Area
Fig 18. Typical Source-Drain Diode
Forward Voltage
RD
VDS
VGS
D.U.T.
RG
-
+
VDD
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 21a. Switching Time Test Circuit
V
DS
TA , Ambient Temperature ( °C )
90%
Fig 20. Maximum Drain Current Vs.
Ambient Temperature
Current Regulator
Same Type as D.U.T.
10%
V
GS
t
t
r
t
t
f
d(on)
d(off)
50KΩ
Fig 21b. Switching Time Waveforms
.2µF
12V
.3µF
-
V
+
DS
Q
G
D.U.T.
-10V
V
GS
Q
Q
GD
GS
-3mA
V
G
I
I
D
G
Current Sampling Resistors
Charge
Fig 22a. Gate Charge Test Circuit
Fig 22b. Basic Gate Charge Waveform
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INFINEON [ Infineon ]
