IRF540N
3000
20
16
12
8
V
= 0V,
f = 1MHz
C
I
D
= 16A
GS
iss
rss
oss
C
= C + C
SHORTED
ds
gs
gd ,
gd
V
V
V
= 80V
= 50V
= 20V
DS
DS
DS
C
C
= C
gd
2500
2000
1500
1000
500
= C + C
ds
C
iss
C
oss
4
C
FOR TEST CIRCUIT
SEE FIGURE 13
rss
0
0
0
20
40
60
80
1
10
100
Q
, Total Gate Charge (nC)
V
, Drain-to-Source Voltage (V)
G
DS
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
1000
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
100
10
1
100
10
1
°
T = 175 C
J
100µsec
1msec
°
T = 25 C
J
T
T
= 25°C
10msec
A
J
= 175°C
V
= 0 V
GS
Single Pulse
0.1
0.2
0.1
0.6
1.0
1.4
1.8
1
10
100
1000
V
,Source-to-Drain Voltage (V)
SD
V
, Drain-toSource Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
www.irf.com
INFINEON [ Infineon ]
