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X5083V8I-2.7 参数 Datasheet PDF下载

X5083V8I-2.7图片预览
型号: X5083V8I-2.7
PDF下载: 下载PDF文件 查看货源
内容描述: CPU监控与9Kbit SPI EEPROM [CPU Supervisor with 9Kbit SPI EEPROM]
分类和应用: 光电二极管监控可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 20 页 / 348 K
品牌: INTERSIL [ Intersil ]
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X5083  
To set the new VTRIP voltage, apply the desired VTRIP  
threshold voltage to the VCC pin and tie the WP pin to the  
programming voltage VP. Then send a WREN command,  
followed by a write of Data 00h to address 01h. CS going  
HIGH on the write operation initiates the VTRIP programming  
sequence. Bring WP LOW to complete the operation.  
This procedure must be used to set the voltage to a lower  
value.  
To reset the new VTRIP voltage, apply the desired VTRIP  
threshold voltage to the Vcc pin and tie the WP pin to the  
programming voltage VP. Then send a WREN command,  
followed by a write of data 00h to address 03h. CS going  
HIGH on the write operation initiates the VTRIP programming  
sequence. Bring WP LOW to complete the operation.  
Note: This operation also writes 00h to array address 01h.  
Resetting the V  
Voltage  
TRIP  
Note: This operation also writes 00h to array address 03h.  
This procedure is used to set the VTRIP to a “native” voltage  
level. For example, if the current VTRIP is 4.4V and the new  
V
TRIP must be 4.0V, then the VTRIP must be reset. When  
TRIP is reset, the new VTRIP is something less than 1.7V.  
V
VP = 15-18V  
WP  
CS  
0
1
2
3
4
5 6 7  
0
1
2
3
4
5
6
7
8
9
10  
20 21 22 23  
SCK  
16 Bits  
SI  
06h  
02h  
Write  
00h  
Data  
0001h  
Address  
WREN  
FIGURE 1. SET VTRIP LEVEL SEQUENCE (VCC = DESIRED VTRIP VALUE)  
VP = 15-18V  
WP  
CS  
0
1 2 3 4 5 6 7  
0
1
2
3
4
5
6
7
8
9
10  
20 21 22 23  
SCK  
SI  
16 Bits  
06h  
WREN  
02h  
Write  
00h  
Data  
0003h  
Address  
FIGURE 2. RESET VTRIP LEVEL SEQUENCE (VCC > 3V. WP = 15-18V)  
FN8127.2  
5
September 16, 2005  
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