ISL3150E, ISL3152E, ISL3153E, ISL3155E, ISL3156E, ISL3158E
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at V
= 5V, T = +25°C
A
CC
CC
(Note 4) (Continued)
TEMP
PARAMETER
SYMBOL
TEST CONDITIONS
= 1kΩ, C = 15pF, SW = V (Figure 6),
(°C)
MIN
TYP
MAX UNITS
Receiver Enable from Shutdown to
Output Low
t
R
Full
-
-
200
ns
ZL(SHDN)
L
L
CC
(Notes 9, 11)
RECEIVER SWITCHING CHARACTERISTICS (20Mbps Versions; ISL3156E, ISL3158E)
Maximum Data Rate
f
(Figure 5, Note 12)
(Figure 5)
Full
Full
Full
Full
20
-
30
33
2.5
8
-
Mbps
ns
MAX
Receiver Input to Output Delay
t
, t
45
5
PLH PHL
Receiver Skew | t
- t
PLH PHL
|
t
(Figure 5)
-
ns
SKD
Receiver Enable to Output Low
t
R
= 1kΩ, C = 15pF, SW = V (Figure 6),
CC
-
15
ns
ZL
L
L
(Note 8)
Receiver Enable to Output High
t
t
R
= 1kΩ, C = 15pF, SW = GND (Figure 6),
Full
-
7
15
ns
ZH
L
L
(Note 8)
Receiver Disable from Output Low
Receiver Disable from Output High
Time to Shutdown
t
R
= 1kΩ, C = 15pF, SW = V
(Figure 6)
Full
Full
Full
Full
-
-
8
8
15
15
ns
ns
ns
ns
LZ
L
L
L
CC
R
= 1kΩ, C = 15pF, SW = GND (Figure 6)
HZ
L
t
(Notes 9, 12)
R = 1kΩ, C = 15pF, SW = GND (Figure 6),
L
60
-
160
-
600
200
SHDN
Receiver Enable from Shutdown to
Output High
t
ZH(SHDN)
L
(Notes 9, 11)
= 1kΩ, C = 15pF, SW = V (Figure 6),
CC
Receiver Enable from Shutdown to
Output Low
t
R
Full
-
-
200
ns
ZL(SHDN)
L
L
(Notes 9, 11)
NOTES:
4. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise
specified.
5. Supply current specification is valid for loaded drivers when DE = 0V.
6. Applies to peak current. See “Typical Performance Curves” for more information.
7. Keep RE = 0 to prevent the device from entering SHDN.
8. The RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
9. Transceivers are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the parts are guaranteed
not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See “Low-Power
Shutdown Mode” section.
10. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN.
11. Set the RE signal high time >600ns to ensure that the device enters SHDN.
12. Guaranteed by characterization but not tested.
13. See Figure 8 for more information, and for performance over temperature.
Test Circuits and Waveforms
375Ω
R /2
L
DE
DI
DE
DI
V
V
CC
CC
Z
Y
V
Z
Y
CM
R
= 60Ω
V
L
D
V
OD
D
OD
-7V to +12V
375Ω
V
R /2
L
OC
FIGURE 1A. V
AND V
FIGURE 1B. V
WITH COMMON MODE LOAD
OD
OD
OC
FIGURE 1. DC DRIVER TEST CIRCUITS
FN6363.0
December 14, 2006
8
INTERSIL [ Intersil ]
