ICL7135
Absolute Maximum Ratings
Supply Voltage V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+6V
V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -9V
Analog Input Voltage (Either Input) (Note 1) . . . . . . . . . . . . V+ to V-
Reference Input Voltage (Either Input). . . . . . . . . . . . . . . . . V+ to V-
Clock Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND to V+
Thermal Information
Thermal Resistance (Typical, Note 2) . . . . . . . . . . . . .
θ
JA
(
o
C/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
55
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150
o
C
Maximum Storage Temperature Range . . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300
o
C
NOTE: Pb-free PDIPs can be used for through hole wave solder
processing only. They are not intended for use in Reflow solder
processing applications.
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
o
C to 70
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Input voltages may exceed the supply voltages provided the input current is limited to +100µA.
2.
θ
JA
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
ANALOG
(Notes 3, 4)
Zero Input Reading
Ratiometric Error (Note 4)
V+ = +5V, V- = -5V, T
A
= 25
o
C, f
CLK
Set for 3 Readings/s, Unless Otherwise Specified
TEST CONDITIONS
MIN
-00000
-3
-
-
-
-
-
-
-
TYP
+00000
0
0.5
0.01
0.5
15
1
0.5
2
MAX
+00000
+3
1
-
1
-
10
2
5
UNITS
Counts
Counts
LSB
LSB
LSB
µV
pA
µV/
o
C
ppm/×
o
C
PARAMETER
V
lN
= 0V, V
REF
= 1.000V
V
lN
= V
REF
= 1.000V
-2V
≤
V
IN
≤
+2V
-2V
≤
V
IN
≤
+2V
-V
lN
≡
+V
lN
≈
2V
V
lN
= 0V, Full scale = 2.000V
V
lN
= 0V
V
lN
= 0V, 0
o
C to 70
o
C
V
lN
= +2V, 0
o
C to 70
o
C
Ext. Ref. 0ppm/
o
C
Linearity Over
±
Full Scale (Error of Reading from Best Straight Line)
Differential Linearity (Difference Between Worse Case Step of
Adjacent Counts and Ideal Step)
Rollover Error (Difference in Reading for Equal Positive and
Negative Voltage Near Full Scale)
Noise (Peak-to-Peak Value Not Exceeded 95% of Time), e
N
Input Leakage Current, I
ILK
Zero Reading Drift (Note 7)
Scale Factor Temperature Coefficient, T
C
(Notes 5 and 7)
DIGITAL INPUTS
Clock In, Run/Hold (See Figure 2)
V
INH
V
INL
I
INL
I
INH
DIGITAL OUTPUTS
All Outputs, V
OL
B1 , B2 , B4 , B8 , D1 , D2 , D3 , D4 , D5 , V
OH
BUSY, STROBE, OVERRANGE, UNDERRANGE, POLARITY, V
OH
SUPPLY
+5V Supply Range, V+
-5V Supply Range, V-
+5V Supply Current, I+
-5V Supply Current, I-
Power Dissipation Capacitance, C
PD
CLOCK
Clock Frequency (Note 6)
2.8
-
V
IN
= 0V
V
IN
= +5V
I
OL
= 1.6mA
I
OH
= -1mA
I
OH
= -10µA
-
-
-
2.4
4.9
+4
-3
f
C
= 0
f
C
= 0
vs Clock Frequency
-
-
-
DC
2.2
1.6
0.02
0.1
0.25
4.2
4.99
+5
-5
1.1
0.8
40
2000
-
0.8
0.1
10
0.40
-
-
+6
-8
3.0
3.0
-
1200
V
V
mA
µA
V
V
V
V
V
mA
mA
pF
kHz
NOTES:
3. Tested in 4
1
/
2
digit (20.000 count) circuit shown in Figure 3. (Clock frequency 120kHz.)
4. Tested with a low dielectric absorption integrating capacitor, the 27Ω INT OUT resistor shorted, and R
lNT
= 0. See Component Value Selection Discussion.
5. The temperature range can be extended to 70
o
C and beyond as long as the auto-zero and reference capacitors are increased to absorb the higher leakage
of the ICL7135.
6. This specification relates to the clock frequency range over which the lCL7135 will correctly perform its various functions See “Max Clock Frequency”
section for limitations on the clock frequency range in a system.
7. Parameter guaranteed by design or characterization. Not production tested.
3
FN3093.3
INTERSIL [ INTERSIL CORPORATION ]
