HIN202E thru HIN241E
Test Circuits (HIN232E)
+4.5V TO
+5.5V INPUT
C1+
V+
1
2
3
4
5
6
7
8
16
15
14
V
CC
GND
T1
-
+
0.1µF
C3
C1-
C2+
C2-
OUT
V
C1+
V+
1
2
3
4
5
6
7
8
16
CC
R1 13
IN
+
0.1µF
3kΩ
GND 15
R1
12
11
10
9
C1
-
OUT
T1
C1-
C2+
C2-
V-
14
13
12
11
T1 OUTPUT
OUT
T1
IN
V-
R1
IN
RS-232 ±30V INPUT
TTL/CMOS OUTPUT
TTL/CMOS INPUT
+
T2
0.1µF
T2
IN
OUT
C2
-
R1
OUT
R2
IN
-
R2
OUT
+
T1
IN
0.1µF C4
T2
TTL/CMOS INPUT
T2 10
IN
OUT
3kΩ
R
= V /I T2
IN
OUT
OUT
R2
OUT
9
TTL/CMOS OUTPUT
R2
IN
T1
OUT
T2
OUTPUT
V
= ±2V
A
IN
RS-232
±30V INPUT
FIGURE 1. GENERAL TEST CIRCUIT
FIGURE 2. POWER-OFF SOURCE RESISTANCE
CONFIGURATION
VOLTAGE DOUBLER
VOLTAGE INVERTER
S5
S1
S3
S2
S4
C2+
C1+
V+ = 2V
S6
CC
V
GND
CC
+
+
+
+
C3
C2
C4
C1
-
-
-
-
V
GND
CC
GND
V- = - (V+)
C1-
C2-
S7
S8
RC
OSCILLATOR
FIGURE 3. CHARGE PUMP
voltage doubler section (V+) is approximately 200Ω, and the
output impedance of the voltage inverter section (V-) is
approximately 450Ω. A typical application uses 0.1µF
capacitors for C1-C4, however, the value is not critical.
Increasing the values of C1 and C2 will lower the output
impedance of the voltage doubler and inverter, increasing
the values of the reservoir capacitors, C3 and C4, lowers the
ripple on the V+ and V- supplies.
Detailed Description
The HIN2XXE family of high-speed RS-232
transmitters/receivers are powered by a single +5V power
supply, feature low power consumption, and meet all ElA
RS232C and V.28 specifications. The circuit is divided into
three sections: the charge pump, transmitter, and receiver.
Charge Pump
An equivalent circuit of the charge pump is illustrated in
Figure 3. The charge pump contains two sections: the
voltage doubler and the voltage inverter. Each section is
driven by a two phase, internally generated clock to generate
+10V and -10V. The nominal clock frequency is 125kHz.
During phase one of the clock, capacitor C1 is charged to
During shutdown mode (HIN205E, HIN206E, HIN211E,
HIN213E, HIN235E, HIN236E and HIN241E) the charge
pump is turned off, V+ is pulled down to V , V- is pulled up
CC
to GND, and the supply current is reduced to less than 10µA.
The transmitter outputs are disabled and the receiver
outputs (except for HIN213E, R4 and R5) are placed in the
high impedance state.
V
. During phase two, the voltage on C1 is added to V
,
CC
CC
producing a signal across C3 equal to twice V . During
CC
phase two, C2 is also charged to 2V , and then during
Transmitters
CC
phase one, it is inverted with respect to ground to produce a
The transmitters are TTL/CMOS compatible inverters which
translate the inputs to RS-232 outputs. The input logic
signal across C4 equal to -2V . The charge pump accepts
CC
input voltages up to 5.5V. The output impedance of the
threshold is about 26% of V , or 1.3V for V
CC
= 5V. A logic
CC
3-12
INTERSIL [ Intersil ]
