EL7531
Forced PWM Mode/SYNC Input
Component Selection
Pulling the SYNC pin HI (>2.5V) forces the converter into
PWM mode in the next switching cycle regardless of output
current. The duration of the transition varies depending on
the output current. Figures 22 and 23 (under two different
loading conditions) show the device goes from PFM to PWM
mode
Because of the fixed internal compensation, the component
choice is relatively narrow. For a regulator with fixed output
voltage, only two capacitors and one inductor are required.
We recommend 10µf to 22µF multi-layer ceramic capacitors
with X5R or X7R rating for both the input and output
capacitors, and 1.5 to 2.2µH for the inductor.
The RMS current present at the input capacitor is decided by
the following formula:
Start-Up and Shut-Down
When the EN pin is tied to V , and V reaches
IN
IN
approximately 2.4V, the regulator begins to switch. The
inductor current limit is gradually increased to ensure proper
soft-start operation.
V
× (V – V
)
O
IN
O
-----------------------------------------------
I
=
× I
INRMS
O
V
IN
When the EN pin is connected to a logic low, the EL7531 is
in the shut-down mode. All the control circuitry and both
This is about half of the output current I for all the V . This
O
O
input capacitor must be able to handle this current.
MOSFETs are off, and V
falls to zero. In this mode, the
OUT
The inductor peak-to-peak ripple current is given as:
total input current is less than 1µA.
(V – V ) × V
O
IN
O
When the EN reaches logic HI, the regulator repeats the
start-up procedure, including the soft-start function.
-------------------------------------------
=
∆I
IL
L × V × f
IN
S
Current Limit and Short-Circuit Protection
L is the inductance
the switching frequency (nominally 1.4MHz)
The current limit is set at about 2A for the PMOS. When a
short-circuit occurs in the load, the preset current limit
restricts the amount of current available to the output, which
causes the output voltage to drop below the preset voltage.
In the meantime, the excessive current heats up the
regulator until it reaches the thermal shut-down point.
f
S
The inductor must be able to handle I for the RMS load
O
current, and to assure that the inductor is reliable, it must
handle the 2A surge current that can occur during a current
limit condition.
Layout Considerations
The layout is very important for the converter to function
properly. The following PC layout guidelines should be
followed:
Thermal Shut-Down
Once the junction reaches about 145°C, the regulator shuts
down. Both the P channel and the N channel MOSFETs turn
off. The output voltage will drop to zero. With the output
MOSFETs turned off, the regulator will soon cool down.
Once the junction temperature drops to about 130°C, the
regulator will restart again in the same manner as EN pin
connects to logic HI.
1. Separate the Power Ground ( ) and Signal Ground
(
); connect them only at one point right at the pins
2. Place the input capacitor as close to V and PGND pins
IN
as possible
3. Make the following PC traces as small as possible:
4. from LX pin to L
Thermal Performance
The EL7531 is available in a fused-lead MSOP10 package.
Compared with regular MSOP10 package, the fused- lead
5. from C to PGND
O
package provides lower thermal resistance. The θ is
6. If used, connect the trace from the FB pin to R and R
JA
1
2
100°C/W on a 4-layer board and 125°C/W on 2-layer board.
Maximizing the copper area around the pins will further
improve the thermal performance.
as close as possible
7. Maximize the copper area around the PGND pin
8. Place several via holes under the chip to additional
ground plane to improve heat dissipation
Output Voltage Selection
Users can set the output voltage of the variable version with
a resister divider, which can be chosen based on the
following formula:
The demo board is a good example of layout based on this
outline. Please refer to the EL7531 Application Brief.
R
R
2
------
V
= 0.8 × 1 +
O
1
FN7428.6
9
August 5, 2005
INTERSIL [ Intersil ]
