EL7155
Applications Information
Product Description
The EL7155 is a high performance 40MHz pin driver. It
contains two analog switches connecting V
H
to OUT
H
and
V
L
to OUT
L
. Depending on the value of the IN pin, one of the
two switches will be closed and the other switch open. An
output enable (OE) is also supplied which opens both
switches simultaneously.
Due to the topology of the EL7155, V
L
should always be
connected to a voltage equal to, or lower than GND. V
H
can
be connected to any voltage between V
L
and the positive
supply, V
S
+.
The EL7155 is available in both the 8-pin SO and the 8-pin
PDIP packages. The relevant package should be chosen
depending on the calculated power dissipation.
Power Dissipation Calculation
When switching at high speeds, or driving heavy loads, the
EL7155 drive capability is limited by the rise in die
temperature brought about by internal power dissipation. For
reliable operation die temperature must be kept below
T
JMAX
(125°C). It is necessary to calculate the power
dissipation for a given application prior to selecting the
package type.
Power dissipation may be calculated:
PD
=
(
V
S
×
I
S
)
+
(
C
INT
×
V
S
×
f
)
+
(
C
L
×
V
OUT
×
f
)
2
2
where:
V
S
is the total power supply to the EL7155 (from V
S
+ to
GND)
V
OUT
is the swing on the output (V
H
- V
L
)
C
L
is the load capacitance
C
INT
is the internal load capacitance (100pF max)
I
S
is the quiescent supply current (3mA max)
f is frequency
Having obtained the application’s power dissipation, a
maximum package thermal coefficient may be determined,
to maintain the internal die temperature below T
JMAX
:
(
T
JMAX
–
T
MAX
)
θ
JA
= ----------------------------------------------
PD
3-state Operation
When the OE pin is low, the output is 3-state (floating.) The
output voltage is the parasitic capacitance’s voltage. It can
be any voltage between V
H
and V
L
, depending on the
previous state. At 3-state, the output voltage can be pushed
to any voltage between V
H
and V
L
. The output voltage can’t
be pushed higher than V
H
or lower than V
L
since the body
diode at the output stage will turn on.
Supply Voltage Range and Input Compatibility
The EL7155 is designed for operation on supplies from 5V to
15V (4.5V to 18V maximum). The table on page 6 shows the
specifications for the relationship between the V
S
+, V
H
, V
L
,
and GND pins.
All input pins are compatible with both 3V and 5V CMOS
signals. With a positive supply (V
S
+) of 5V, the EL7155 is
also compatible with TTL inputs.
where:
T
JMAX
is the maximum junction temperature (125°C)
T
MAX
is the maximum operating temperature
PD is the power dissipation calculated above
θ
JA
thermal resistance on junction to ambient
θ
JA
is 160°C/W for the SO8 package and 100°C/W for the
PDIP8 package when using a standard JEDEC JESD51-3
single-layer test board. If T
JMAX
is greater than 125°C when
calculated using the equation above, then one of the
following actions must be taken:
Reduce
θ
JA
the system by designing more heat-sinking
into the PCB (as compared to the standard JEDEC
JESD51-3)
Use the PDIP8 instead of the SO8 package
De-rate the application either by reducing the switching
frequency, the capacitive load, or the maximum operating
(ambient) temperature (T
MAX
)
Power Supply Bypassing
When using the EL7155, it is very important to use adequate
power supply bypassing. The high switching currents
developed by the EL7155 necessitate the use of a bypass
capacitor between the V
S
+ and GND pins. It is
recommended that a 2.2µF tantalum capacitor be used in
parallel with a 0.1µF low-inductance ceramic MLC capacitor.
These should be placed as close to the supply pins as
possible. It is also recommended that the V
H
and V
L
pins
have some level of bypassing, especially if the EL7155 is
driving highly capacitive loads.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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