EL5123, EL5223, EL5323, EL5423
Typical Performance Curves
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD, QFN EXPOSED
DIEPAD SOLDERED TO PCB PER JESD51-5
3
2.5
2
2.857W
2.703W
QFN32
QFN24
=37°C/W
θ
=35°C/W
JA
θ
JA
1V/DIV
1.5
1
0.5
0
0
25
50
75 85 100
125
150
1µs/DIV
AMBIENT TEMPERATURE (°C)
FIGURE 19. LARGE SIGNAL TRANSIENT RESPONSE
FIGURE 20. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
JEDEC JESD51-3 AND SEMI G42-88
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
(SINGLE LAYER) TEST BOARD
CONDUCTIVITY TEST BOARD
0.8
1.4
758mW
1.333W
0.7
1.2
714mW
1.176W
0.6
TSSOP24
=85°C/W
1.111W
1
QFN32
=132°C/W
JA
θ
JA
0.5
0.4
0.3
0.2
0.1
0
QFN24
=140°C/W
θ
0.8 870mW
θ
TSSOP28
=75°C/W
JA
θ
JA
0.6
TSSOP20
θ
=95°C/W
JA
0.4
0.2
0
MSOP10
θ
=115°C/W
JA
0
25
50
75 85 100
125
150
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
FIGURE 21. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 22. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.9
833mW
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
781mW
TSSOP24
=128°C/W
714mW
486mW
θ
JA
TSSOP28
=120°C/W
θ
JA
MSOP10
=206°C/W
θ
JA
TSSOP20
=140°C/W
θ
JA
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 23. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FN7176.1
November 19, 2004
10
INTERSIL [ Intersil ]
