CA3252
Absolute Maximum Ratings
Thermal Information
o
Output Voltage, V
CEX
. . . . . . . . . . . . . . . . . . . . . . . . . -0.7 to 50V
DC
Thermal Resistance (Typical, Note 2)
θ
C/W
JA
Logic Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Logic Input Voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . .-0.7 to 15V
IN
CC
CA3252E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CA3252M. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150 C
Maximum Storage Temperature Range . . . . . . . . . .-65 C to 150 C
Maximum Lead Temperature Soldering (10s Max) . . . . . . . . . 300 C
45
54
o
Output Sustaining Voltage, V
. . . . . . . . . . . . . . . . . . 35V
CE(SUS)
DC
DC
o
o
Output Current, I (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . 1A
O
o
(SOIC - Lead Tips Only)
Operating Conditions
o
o
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40 C to 105 C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. The Maximum Ambient Temperature is limited for the sustained conditions of the I
CC(ON)
Supply Current test with all Outputs ON. The total
DC current for the CA3252 with all 4 outputs ON should not exceed 0.7A at each output for a total of (4 X 0.7A + Max. I ) ~ 2.9A. This
CC
level of sustained current will significantly increase the on-chip temperature due to increased dissipation. Under any condition, the Absolute
o
Maximum Junction Temperature must not exceed150 C. While any one loaded output may exceed 0.7A, the maximum rating limit is 1A.
2. θ is measured with the component mounted on an evaluation PC board in free air.
JA
o
o
Electrical Specifications T = -40 C to 105 C, V = V = 5V; Unless Otherwise Specified
A
CC
EN
PARAMETER
Output Sustaining Voltage
Output Leakage Current
SYMBOL
TEST CONDITIONS
MIN
MAX
-
UNITS
V
V
I
= 100mA, V = 2V, V
IN
= 2V
35
CE(SUS)
C
EN
I
V
= 50V, V = 2V, V
= 0.8V
-
100
0.3
0.5
0.8
0.8
10
µA
V
CEX
CE IN
EN
Collector to Emitter Saturation Voltage
V
I
I
I
= 100mA, V = 0.8V
IN
-
CE(SAT)
C
C
C
= 300mA, V = 0.8V
IN
-
V
= 600mA, V = 0.8V
IN
-
V
Input Low Voltage
V
-
-15
2
V
IL
Input Low Current
I
V
= 0.4V
µA
V
IL
IN
Input High Voltage
V
I
I
I
= 600mA
-
IH
C
C
C
Input High Current
I
= 600mA, V = 4.5V
IN
-10
-
-10
90
µA
mA
mA
µA
V
IH
Logic Supply Current, All Outputs ON
Logic Supply Current, All Outputs OFF
Clamp Diode Leakage Current
Clamp Diode Forward Voltage
I
= 600mA, All Outputs ON (Note 1)
CC(ON)
I
All Outputs OFF
= 50V (Diode Reverse Voltage)
-
10
CC(OFF)
I
V
-
100
1.8
2.0
-
R
R
V
I
I
= 0.6A
= 1.2A
-
F
F
-
V
F
Output Current
I
V
= 0.4V, V = +13V,
BATT
0.9
A
OUT
IN
Output Load = 10Ω
Turn-ON Propagation Delay Time
Turn-OFF Propagation Delay Time
Low Enable Voltage
t
I
I
= 600mA
= 600mA
-
-
10
10
µs
µs
V
PHL
C
t
PLH
C
V
-
0.8
10
ENL
Low Enable Current
I
V
V
= 0.4V
-15
2.0
-250
µA
V
ENL
EN
EN
High Enable Voltage
V
-
ENH
High Enable Current
I
≥ 2V
+250
µA
ENH
4
INTERSIL [ Intersil ]
