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ADC0804LCN 参数 Datasheet PDF下载

ADC0804LCN图片预览
型号: ADC0804LCN
PDF下载: 下载PDF文件 查看货源
内容描述: 8位,微处理器兼容, A / D转换器 [8-Bit, Microprocessor- Compatible, A/D Converters]
分类和应用: 转换器微处理器光电二极管
文件页数/大小: 16 页 / 252 K
品牌: INTERSIL [ INTERSIL CORPORATION ]
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ADC0802, ADC0803
ADC0804
August 1997
8-Bit, Microprocessor-
Compatible, A/D Converters
Description
The ADC0802 family are CMOS 8-Bit, successive-approxi-
mation A/D converters which use a modified potentiometric
ladder and are designed to operate with the 8080A control
bus via three-state outputs. These converters appear to the
processor as memory locations or I/O ports, and hence no
interfacing logic is required.
The differential analog voltage input has good common-
mode-rejection and permits offsetting the analog zero-input-
voltage value. In addition, the voltage reference input can be
adjusted to allow encoding any smaller analog voltage span
to the full 8 bits of resolution.
Features
• 80C48 and 80C80/85 Bus Compatible - No Interfacing
Logic Required
• Conversion Time < 100µs
• Easy Interface to Most Microprocessors
• Will Operate in a “Stand Alone” Mode
• Differential Analog Voltage Inputs
• Works with Bandgap Voltage References
• TTL Compatible Inputs and Outputs
• On-Chip Clock Generator
• 0V to 5V Analog Voltage Input Range (Single + 5V Supply)
• No Zero-Adjust Required
Ordering Information
PART NUMBER
ADC0802LCN
ADC0802LCD
ADC0802LD
ADC0803LCN
ADC0803LCD
ADC0803LCWM
ADC0803LD
ADC0804LCN
ADC0804LCD
ADC0804LCWM
ERROR
±
1
/
2
LSB
±
3
/
4
LSB
±
1 LSB
±
1
/
2
LSB
±
3
/
4
LSB
±
1 LSB
±
1 LSB
±
1 LSB
±
1 LSB
±
1 LSB
EXTERNAL CONDITIONS
V
REF
/2 = 2.500V
DC
(No Adjustments)
TEMP. RANGE (
o
C)
0 to 70
-40 to 85
-55 to 125
PACKAGE
20 Ld PDIP
20 Ld CERDIP
20 Ld CERDIP
20 Ld PDIP
20 Ld CERDIP
20 Ld SOIC
20 Ld CERDIP
20 Ld PDIP
20 Ld CERDIP
20 Ld SOIC
PKG. NO
E20.3
F20.3
F20.3
E20.3
F20.3
M20.3
F20.3
E20.3
F20.3
M20.3
V
REF
/2 Adjusted for Correct Full Scale
Reading
0 to 70
-40 to 85
-40 to 85
-55 to 125
V
REF
/2 = 2.500V
DC
(No Adjustments)
0 to 70
-40 to 85
-40 to 85
Pinout
ADC0802, ADC0803, ADC0804
(PDIP, CERDIP)
TOP VIEW
CS
RD
WR
CLK IN
INTR
V
IN
(+)
V
IN
(-)
AGND
V
REF
/2
1
2
3
4
5
6
7
8
9
20 V+ OR V
REF
19 CLK R
Typical Application Schematic
1
2
3
5
11
µP
BUS
ANY
µPROCESSOR
12
13
14
15
16
17
18
CS
RD
WR
INTR
DB
7
DB
6
DB
5
DB
4
DB
3
DB
2
DB
1
DB
0
V
IN
(+)
V
IN
(-)
AGND
6
7
8
V
REF
/2
DIFF
INPUTS
8-BIT RESOLUTION
OVER ANY
DESIRED
ANALOG INPUT
VOLTAGE RANGE
V+ 20
CLK R 19
CLK IN
4
+5V
10K
150pF
18 DB
0 (LSB)
17 DB
1
16 DB
2
15 DB
3
14 DB
4
13 DB
5
12 DB
6
11 DB
7 (MSB)
V
REF
/2 9
DGND 10
DGND 10
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
File Number
3094.1
6-5