ISL78840ASRH, ISL78841ASRH, ISL78843ASRH, ISL78845ASRH
Typical Performance Curves
1.01
NORMALIZED FREQUENCY
1.001
1.000
NORMALIZED V
REF
0
20
40
60
80
100 120 140
1.00
0.999
0.998
0.997
0.996
0.995
-60
0.99
0.98
-60 -40 -20
-40
-20
TEMPERATURE (°C)
0
20 40 60 80
TEMPERATURE (°C)
100 120 140
FIGURE 1. FREQUENCY vs TEMPERATURE
FIGURE 2. REFERENCE VOLTAGE vs TEMPERATURE
1.001
NORMALIZED EA REFERENCE
10
3
1.000
FREQUENCY (kHz)
100
100pF
220pF
330pF
470pF
0.998
10
1.0nF
2.2nF
3.3nF
4.7nF
6.8nF
0.997
0.996
-60
1
-40
-20
0
20
40
60
80
100 120 140
TEMPERATURE (°C)
1
10
RT (kΩ)
100
FIGURE 3. EA REFERENCE vs TEMPERATURE
FIGURE 4. RESISTANCE FOR CT CAPACITOR VALUES
GIVEN
Pin Descriptions
RTCT -
This is the oscillator timing control pin. The
operational frequency and maximum duty cycle are set
by connecting a resistor, RT, between V
REF
and this pin
and a timing capacitor, CT, from this pin to GND. The
oscillator produces a sawtooth waveform with a
programmable frequency range up to 2.0MHz. The
charge time, t
C
, the discharge time, t
D
, the switching
frequency, f, and the maximum duty cycle, D
MAX
, can be
approximated from the Equations 1 through 4:
t
C
≈
0.533
⋅
RT
⋅
CT
0.008
⋅
RT
–
3.83
-
t
D
≈
–
RT
⋅
CT
⋅
In
⎛
--------------------------------------------
⎞
⎝
0.008
⋅
RT
–
1.71
⎠
(EQ. 1)
COMP -
COMP is the output of the error amplifier and
the input of the PWM comparator. The control loop
frequency compensation network is connected between
the COMP and FB pins.
FB -
The output voltage feedback is connected to the
inverting input of the error amplifier through this pin. The
non-inverting input of the error amplifier is internally tied
to a reference voltage.
CS -
This is the current sense input to the PWM
comparator. The range of the input signal is nominally 0V
to 1.0V and has an internal offset of 100mV.
GND -
GND is the power and small signal reference
ground for all functions.
OUT -
This is the drive output to the power switching
device. It is a high current output capable of driving the
gate of a power MOSFET with peak currents of
1.0A.
This
GATE output is actively held low when V
DD
is below the
UVLO threshold.
V
DD
-
V
DD
is the power connection for the device. The
total supply current will depend on the load applied to
OUT. Total I
DD
current is the sum of the operating
current and the average output current. Knowing the
operating frequency, f, and the MOSFET gate charge, Qg,
(EQ. 2)
(EQ. 3)
(EQ. 4)
f
=
1
⁄ (
tC
+
tD
)
D
=
t
C
⋅
f
The formulae have increased error at higher frequencies
due to propagation delays. Figure 4 may be used as a
guideline in selecting the capacitor and resistor values
required for a given switching frequency for the
ISL78841, ISL78845ASRH. The value for the ISL78840,
ISL78843ASRH will be twice that shown in Figure 4.
6
FN6991.0
December 21, 2009
INTERSIL [ INTERSIL CORPORATION ]
