HS-1840ARH, HS-1840AEH, HS-1840BRH
Burn-In/Life Test Circuits
R
+V
S
R
1
2
3
4
5
6
7
8
9
10
GND
F4
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
F1
F2
F3
F5
GND
V
R
R
-V
S
+V
S
R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
R
-V
S
R
R
NOTE:
V
S
+ = +15.5V ±0.5V, V
S
- = -15.5V ±0.5V.
R = 1kΩ ±5%.
C
1
= C
2
= 0.01µF ±10%, 1 EACH PER SOCKET, MINIMUM.
D
1
= D
2
= 1N4002, 1 EACH PER BOARD, MINIMUM.
INPUT SIGNALS:
SQUARE WAVE, 50% DUTY CYCLE, 0V TO 15V PEAK ±10%.
F1 = 100kHz; F2 = F1/2; F3 = F1/4; F4 = F1/8; F5 = F1/16.
NOTE:
R = 1kΩ ±5%, 1/4W.
C
1
= C
2
= 0.01µF MINIMUM, 1 EACH PER SOCKET, MINIMUM.
V
S
+ = 15.5V ±0.5V, V
S
- = -15.5V ±0.5V, V
R
= 15.5 ±0.5V
FIGURE 1. DYNAMIC BURN-IN AND LIFE TEST CIRCUIT
NOTES:
1. The above test circuits are utilized for all package types.
2. The Dynamic Test Circuit is utilized for all life testing.
FIGURE 2. .STATIC BURN-IN TEST CIRCUIT
Irradiation Circuit
HS-1840ARH, HS-1840AEH, HS-1840BRH
+15V
NC
NC
+1V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
+5V
28
27
26
25
24
23
22
21
20
19
18
17
16
15
-15V
1kΩ
NOTE:
3. All irradiation testing is performed in the 28 lead CERDIP package.
4
FN4355.4
November 17, 2011
INTERSIL [ INTERSIL CORPORATION ]
