HS-2700RH
Test Circuit
ACOUT
400
0.1
10K
1 OPEN
2 S3A
S1
OPEN 2
S2
OPEN 2
10K
100
100
2
S3B
VAC
0.1
1
-VEE
2
1
1
1
2
S5A
1 S6
1.6K
1
+VCC
75pF (NOTE)
-1/10
V1
FOR LOOP STABILITY,
USE MIN VALUE CAPACITOR
TO PREVENT OSCILLATION
-
DUT
+
OPEN 1
50K
2
S5B 1
S8
2
2K
S9
1
2
V2
x2
E
OUT
ALL RESISTORS =
±1%
(Ω)
ALL CAPACITORS =
±10%
(µF)
BUFFER
500K
OPEN
+
-
-1
+
-
1
OPEN
50K
NOTE: Includes stray capacitances.
Timing Waveforms
VIN
+
VOUT
-
1.6K
400
75pF
FIGURE 1. SIMPLIFIED TEST CIRCUIT
+1.0V
INPUT
INPUT
+40mV
0V
-1.0V
+4V
+2.5V
OUTPUT
-2.5V
-4V
∆T
SLEW
RATE
=
∆V/∆T
∆V
0V
OVERSHOOT
+160mV
90%
OUTPUT
10%
0V
RISE TIME
-40mV
FIGURE 2. SLEW RATE WAVEFORM
FIGURE 3. TRANSIENT RESPONSE WAVEFORM
NOTE: Measured on both positive and negative transitions. Capacitance at Compensation pin should be minimized.
2