HA-5002
Test Circuit and Waveforms
(Continued)
V
IN
V
IN
V
OUT
V
OUT
R
S
= 50Ω, R
L
= 100Ω
LARGE SIGNAL WAVEFORMS
R
S
= 50Ω, R
L
= 1kΩ
LARGE SIGNAL WAVEFORMS
Schematic Diagram
V
1
+
R
8
Q
19
R
4
Q
25
R
10
Q
9
Q
10
R
5
Q
21
Q
11
Q
15
Q
23
Q
24
Q
17
Q
16
R
7
R
12
R
3
V
1
-
IN
Q
7
Q
4
Q
27
Q
6
R
11
OUT
R
N2
Q
5
Q
22
Q
8
R
6
Q
14
R
2
Q
13
R
N3
V
2
-
Q
2
Q
26
Q
20
Q
18
Q
3
Q
1
R
1
Q
12
V
2
+
R
9
R
N1
Application Information
Layout Considerations
The wide bandwidth of the HA-5002 necessitates that high
frequency circuit layout procedures be followed. Failure to
follow these guidelines can result in marginal performance.
Probably the most crucial of the RF/video layout rules is the
use of a ground plane. A ground plane provides isolation and
minimizes distributed circuit capacitance and inductance
which will degrade high frequency performance.
Other considerations are proper power supply bypassing
and keeping the input and output connections as short as
possible which minimizes distributed capacitance and
reduces board space.
Power Supply Decoupling
For optimal device performance, it is recommended that the
positive and negative power supplies be bypassed with
capacitors to ground. Ceramic capacitors ranging in value
from 0.01 to 0.1µF will minimize high frequency variations in
supply voltage, while low frequency bypassing requires
5
FN2921.11
March 8, 2006
INTERSIL [ INTERSIL CORPORATION ]
