网络芯片 - GD82559ER
目录
1.
引言............................................................................................................................. 1
1.1
1.2
2.
2.1
2.2
2.3
2.4
3.
3.1
3.2
GD82559ER概述....................................................................................................... 1
推荐阅读............................................................................................................ 1
并行子系统概述............................................... .............................................. 3
FIFO子系统Overview.................................................................................................4
10/100 Mbps的串行CSMA / CD机概述........................................ ............................ 5
10/100 Mbps的物理层单位........................................... ............................................ 5
信号类型定义....................................................................................................... 7
PCI总线接口Signals................................................................................................... 7
3.2.1地址和数据信号........................................... ....................................... 7
3.2.2接口控制信号............................................ ........................................ 8
3.2.3系统和电源管理信号.......................................... ................. 9
本地存储器接口信号.............................................. ........................................... 9
可测性端口信号.....................................................................................................10
PHY信号.....................................................................................................................11
82559ER初始化.......................................................................................................13
4.1.1对82559ER单位初始化的影响.......................................... .................. 13
PCI Interface.....................................................................................................................14
4.2.1 82559ER公交运营............................................ ..................................... 14
4.2.2 Clockrun信号............................................. .................................................. 0.22
4.2.3电源管理事件信号........................................... ......................... 22
4.2.4电源状态....................................................................................................23
4.2.5唤醒事件........................................... .................................................. ..27
并行闪存接口.....................................................................................................28
串行EEPROM接口............................................... .................................................. 28
10/100 Mbps的CSMA / CD机.......................................... ..................................................三十
4.5.1全双工.......................................................................................................31
4.5.2流量控制.....................................................................................................31
4.5.3地址过滤修改............................................ ............................. 31
4.5.4长帧接收............................................ ......................................... 31
媒体独立接口（ MII ）管理接口.......................................... ..... 32
介绍.......................................................................................................................33
异步测试模式............................................... .................................................. 33
测试功能说明............................................... .................................................. 33
85/85.................................................................................................................................33
三态.............................................................................................................................34
NAND - 树......................................................................................................................34
100BASE -TX PHY单元....................................................................................................37
6.1.1 100BASE- TX发送时钟发生器......................................... ............... 37
GD82559ER架构概述............................................... ................................. 3
信号说明............................................................................................................... 7
3.3
3.4
3.5
4.
4.1
4.2
GD82559ER媒体访问控制功能说明................................. 13
4.3
4.4
4.5
4.6
5.
5.1
5.2
5.3
5.4
5.5
5.6
6.
6.1
GD82559ER测试端口功能.............................................. ................................. 33
GD82559ER物理层功能说明............................................. ... 37
数据表
iii
INTEL [ INTEL CORPORATION ]
