Fast Ethernet 10/100 Quad Transceivers — LXT974/LXT975
Figure 26. MII - 100BASE-TX Receive Timing
0ns
250ns
TPIP
t6
t7
CRS
TRSTE
t4
RX_DV
t1
t2
RXD<3:0>
RX_CLK
t8
t9
COL
Table 31. MII - 100BASE-TX Receive Timing Parameters
1
Parameter
Sym
Min
Typ
Max
Units
RXD, RX_DV, RX_ER setup to RX_CLK High
RXD, RX_DV, RX_ER hold from RX_CLK High
CRS asserted to RXD<3:0>, RX_DV
t1
t2
t4
t6
t7
t8
t9
10
5
–
–
8
–
–
ns
ns
–
–
BT
BT
BT
BT
BT
Receive start of “J” to CRS asserted
Receive start of “T” to CRS de-asserted
Receive start of “J” to COL asserted
Receive start of “T” to COL de-asserted
0
15 - 19
23 - 27
15 - 19
23 - 27
20
28
20
28
13
0
13
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production testing.
Datasheet
53
INTEL [ INTEL ]
