Fast Ethernet 10/100 Quad Transceivers — LXT974/LXT975
circuitry inside the LXT974/975, which helps line performance. Second, if the VCC planes are
laid out correctly, it keeps digital switching noise away from external connectors, reducing EMI
problems.
The recommended implementation is to divide the VCC plane into two sections. The digital
section supplies power to the digital VCC pin, MII VCC pin, and to the external components. The
analog section supplies power to VCCH, VCCT, and VCCR pins of the LXT974/975. The break
between the two planes should run under the device. In designs with more than one LXT974/975,
a single continuous analog VCC plane can be used to supply them all.
The digital and analog VCC planes should be joined at one or more points by ferrite beads. The
beads should produce at least a 100Ω impedance at 100 MHz. The beads should be placed so that
current flow is evenly distributed. The maximum current rating of the beads should be at least
150% of the current that is actually expected to flow through them. Each LXT974/975 draws a
maximum of 500 mA from the analog supply so beads rated at 750 mA should be used. A bulk cap
(2.2 -10 µF) should be placed on each side of each ferrite bead to stop switching noise from
traveling through the ferrite.
In addition, a high-frequency bypass cap (.01µf) should be placed near each analog VCC pin.
3.1.2.1
3.1.3
Ground Noise
The best approach to minimize ground noise is strict use of good general design guidelines and by
filtering the VCC plane.
Power and Ground Plane Layout Considerations
Great care needs to be taken when laying out the power and ground planes. The following
guidelines are recommended:
• Follow the guidelines in the LXT974/975 Layout Guide for locating the split between the
digital and analog VCC planes.
• Keep the digital VCC plane away from the TPOP/N and TPIP/N signals, away from the
magnetics, and away from the RJ-45 connectors.
• Place the layers so that the TPOP/N and TPIP/N signals can be routed near or next to the
ground plane. For EMI reasons, it is more important to shield TPOP/N and TPIP/N.
3.1.3.1
Chassis Ground
For ESD reasons, it is a good design practice to create a separate chassis ground that encircles the
board and is isolated via moats and keep-out areas from all circuit-ground planes and active
signals. Chassis ground should extend from the RJ-45 connectors to the magnetics, and can be
used to terminate unused signal pairs (‘Bob Smith’ termination). In single-point grounding
applications, provide a single connection between chassis and circuit grounds with a 2kV isolation
capacitor. In multi-point grounding schemes (chassis and circuit grounds joined at multiple
points), provide 2kV isolation to the Bob Smith termination.
3.1.4
MII Terminations
Series termination resistors are not required on the MII signals driven by the LXT974/975.
Datasheet
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INTEL [ INTEL ]
