Fast Ethernet 10/100 Quad Transceivers — LXT974/LXT975
2.5.3
2.5.4
100BASE-X Protocol Sublayer Operations
With respect to the 7-layer communications model, the LXT974/975 is a Physical Layer 1 (PHY)
device. The LXT974/975 implements the Physical Coding Sublayer (PCS), Physical Medium
Attachment (PMA), and Physical Medium Dependent (PMD) sublayers of the reference model
defined by the IEEE 802.3u specification. The following paragraphs discuss LXT974/975
operation from the reference model point of view.
PCS Sublayer
The Physical Coding Sublayer (PCS) provides the MII interface, as well as the 4B/5B encoding/
decoding function.
For 100TX and 100FX operation, the PCS layer provides IDLE symbols to the PMD-layer line
driver as long as TX_EN is de-asserted.
For 10T operation, the PCS layer merely provides a bus interface and serialization/de-serialization
function. 10T operation does not use the 4B/5B encoder.
2.5.4.1
Preamble Handling
When the MAC asserts TX_EN, the PCS substitutes a /J/K symbol pair, also known as the Start of
Stream Delimiter (SSD), for the first two nibbles received across the MII. The PCS layer continues
to encode the remaining MII data, following Table 19 on page 32, until TX_EN is de-asserted. It
then returns to supplying IDLE symbols to the line driver.
In the receive direction, the PCS layer performs the opposite function, substituting two preamble
nibbles for the SSD.
Figure 15. LXT974/975 Protocol Sublayers
MII Interface
LXT974
PCS
Sublayer
Encoder/Decoder
Serializer/De-serializer
PMA
Sublayer
Link/Carrier Detect
PECL Interface
PMD
Sublayer
Scrambler/
De-scrambler
Fiber Transceiver
100BASE-TX
100BASE-FX
Datasheet
33
INTEL [ INTEL ]
