1-Gbit P30 Family
Table 8.
Discrete Bottom Parameter Memory Maps (all packages)
Programming Size
Programming Size
Region (KB)
Blk
256-Mbit
Blk
128-Mbit
Blk
64-Mbit
Region
(KB)
128
18
0F0000 - 0FFFFF
10
070000 - 07FFFF
128
32
4
3
010000 - 01FFFF
00C000 - 00FFFF
4
3
010000 - 01FFFF
00C000 - 00FFFF
0
32
0
000000 - 03FFFF
0
000000 - 00FFFF
Table 9.
512-Mbit Memory Map (Easy BGA and QUAD+ SCSP)
512-Mbit Flash (2x256-Mbit w/ 1CE)
Flash Die #
Die Stack Config.
Size (KB)
Blk
Address Range
32
258
FFC000 - FFFFFF
32
255
254
FF0000 - FF3FFF
FE0000 - FEFFFF
Flash Die #2
(Top Parameter)
2
128
128
128
0
000000 - 00FFFF
FF0000 - FFFFFF
258
128
32
4
3
010000 - 01FFFF
00C000 - 00FFFF
Flash Die #1 (Bottom
Parameter)
1
32
0
000000 - 003FFF
Note: Refer to 256-Mbit Memory Map (Table 7 and Table 8) for Programming Region Information.
Datasheet
Intel StrataFlash® Embedded Memory (P30)
Order Number: 306666, Revision: 001
April 2005
27