MAX 7000A Programmable Logic Device Data Sheet
Table 18. EPM7032AE Internal Timing Parameters (Part 2 of 2)
Note (1)
Symbol
Parameter
Conditions
Speed Grade
-7
Unit
-4
-10
Min
Max Min
Max
Min
Max
tIC
Array clock delay
Register enable time
Global control delay
Register preset time
Register clear time
PIA delay
1.2
0.6
0.8
1.2
1.2
0.9
2.5
2.0
1.0
1.3
1.9
1.9
1.5
4.0
2.5
1.2
1.9
2.6
2.6
2.1
5.0
ns
ns
ns
ns
ns
ns
ns
tEN
tGLOB
tPRE
tCLR
tPIA
(2)
(6)
tLPA
Low-power adder
36
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