MAX 7000A Programmable Logic Device Data Sheet
Figure 6. I/O Control Block of MAX 7000A Devices
6 or 10 Global
Output Enable Signals
(1)
PIA
OE Select Multiplexer
VCC
To Other I/O Pins
GND
From
Macrocell
Open-Drain Output
Slew-Rate Control
Fast Input to
Macrocell
Register
To PIA
Note:
(1) EPM7032AE, EPM7064AE, EPM7128A, EPM7128AE, EPM7256A, and EPM7256AE devices have six output enable
signals. EPM7512AE devices have 10 output enable signals.
When the tri-state buffer control is connected to ground, the output is
tri-stated (high impedance) and the I/O pin can be used as a dedicated
input. When the tri-state buffer control is connected to VCC, the output is
enabled.
The MAX 7000A architecture provides dual I/O feedback, in which
macrocell and pin feedbacks are independent. When an I/O pin is
configured as an input, the associated macrocell can be used for buried
logic.
14
Altera Corporation
INTEL [ INTEL ]
