MAX 7000A Programmable Logic Device Data Sheet
Figure 15. 49-Pin Ultra FineLine BGA Package Pin-Out Diagram
Package outlines not drawn to scale.
A1 Ball
Pad Corner
Indicates
location of
Ball A1
A
B
C
D
E
F
EPM7064AE
G
7
6
5
4
3
2
1
Figure 16. 84-Pin PLCC Package Pin-Out Diagram
Package outline not drawn to scale.
I/O
VCCIO
I/O/TDI
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
I/O/TMS
I/O
I/O
VCCIO
I/O
I/O
I/O
I/O
I/O
GND
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
I/O
I/O
GND
I/O/TDO
I/O
I/O
I/O
I/O
VCCIO
I/O
I/O
I/O
I/O/TCK
I/O
I/O
GND
I/O
I/O
I/O
I/O
EPM7128A
EPM7128AE
I/O
54
Altera Corporation
INTEL [ INTEL ]
