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EPM7128STC100-6N 参数 Datasheet PDF下载

EPM7128STC100-6N图片预览
型号: EPM7128STC100-6N
PDF下载: 下载PDF文件 查看货源
内容描述: [EE PLD, 6ns, 128-Cell, CMOS, PQFP100, TQFP-100]
分类和应用: 时钟输入元件可编程逻辑
文件页数/大小: 66 页 / 1486 K
品牌: INTEL [ INTEL ]
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MAX 7000 Programmable Logic Device Family Data Sheet  
Each LAB is fed by the following signals:  
36 signals from the PIA that are used for general logic inputs  
Global controls that are used for secondary register functions  
Direct input paths from I/O pins to the registers that are used  
for fast setup times for MAX 7000E and MAX 7000S devices  
Macrocells  
The MAX 7000 macrocell can be individually configured for either  
sequential or combinatorial logic operation. The macrocell consists  
of three functional blocks: the logic array, the product-term select  
matrix, and the programmable register. The macrocell of EPM7032,  
EPM7064, and EPM7096 devices is shown in Figure 3.  
Figure 3. EPM7032, EPM7064 & EPM7096 Device Macrocell  
Global Global  
Logic Array  
Clear  
Clocks  
From  
2
I/O pin  
Parallel Logic  
Expanders  
(from other  
macrocells)  
Fast Input Programmable  
Select Register  
Register  
Bypass  
To I/O  
Control  
Block  
PRN  
D/T  
Q
Clock/  
Enable  
Select  
Product-  
Term  
Select  
Matrix  
ENA  
CLRN  
VCC  
Clear  
Select  
to PIA  
Shared Logic  
Expanders  
36 Signals  
from PIA  
16 Expander  
Product Terms  
Altera Corporation  
9