Chapter 2: MAX II Architecture
2–7
Logic Elements
Figure 2–6. MAX II LE
Register chain
routing from
previous LE
LAB-wide
Synchronous
Register Bypass
LAB Carry-In
Carry-In1
Load
Programmable
Register
LAB-wide
Synchronous
Packed
Register Select
addnsub
Carry-In0
Clear
LUT chain
routing to next LE
data1
Row, column,
and DirectLink
routing
PRN/ALD
data2
data3
Synchronous
Load and
Clear Logic
Look-Up
Table
(LUT)
Carry
Chain
D
Q
ADATA
data4
ENA
CLRN
Row, column,
and DirectLink
routing
labclr1
labclr2
Asynchronous
Clear/Preset/
Load Logic
Local routing
labpre/aload
Chip-Wide
Reset (DEV_CLRn)
Register chain
output
Register
Clock and
Clock Enable
Select
Feedback
labclk1
labclk2
labclkena1
labclkena2
Carry-Out0
Carry-Out1
LAB Carry-Out
Each LE’s programmable register can be configured for D, T, JK, or SR operation. Each
register has data, true asynchronous load data, clock, clock enable, clear, and
asynchronous load/preset inputs. Global signals, general-purpose I/O pins, or any
LE can drive the register’s clock and clear control signals. Either general-purpose I/O
pins or LEs can drive the clock enable, preset, asynchronous load, and asynchronous
data. The asynchronous load data input comes from the data3 input of the LE. For
combinational functions, the LUT output bypasses the register and drives directly to
the LE outputs.
Each LE has three outputs that drive the local, row, and column routing resources. The
LUT or register output can drive these three outputs independently. Two LE outputs
drive column or row and DirectLink routing connections and one drives local
interconnect resources. This allows the LUT to drive one output while the register
drives another output. This register packing feature improves device utilization
because the device can use the register and the LUT for unrelated functions. Another
special packing mode allows the register output to feed back into the LUT of the same
LE so that the register is packed with its own fan-out LUT. This provides another
mechanism for improved fitting. The LE can also drive out registered and
unregistered versions of the LUT output.
© October 2008 Altera Corporation
MAX II Device Handbook
INTEL [ INTEL ]
