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EPM570T100I5N 参数 Datasheet PDF下载

EPM570T100I5N图片预览
型号: EPM570T100I5N
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash PLD, 8.7ns, 440-Cell, CMOS, PQFP100, 16 X 16 MM, 0.50 MM PITCH, LEAD FREE, TQFP-100]
分类和应用: 输入元件可编程逻辑
文件页数/大小: 88 页 / 982 K
品牌: INTEL [ INTEL CORPORATION ]
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5–4
Chapter 5: DC and Switching Characteristics
Operating Conditions
Table 5–4.
MAX II Device DC Electrical Characteristics
(Note 1)
(Part 2 of 2)
Symbol
I
PULLUP
Parameter
I/O pin pull-up resistor
current when I/O is
unprogrammed
Input capacitance for
user I/O pin
Input capacitance for
dual-purpose
GCLK/user I/O pin
Conditions
Minimum
Typical
Maximum
300
Unit
µA
C
IO
C
GCLK
8
8
pF
pF
Notes to
(1) Typical values are for T
A
= 25°C, V
CCINT
= 3.3 or 2.5 V, and V
CC IO
= 1.5 V, 1.8 V, 2.5 V, or 3.3 V.
(2) This value is specified for normal device operation. The value may vary during power-up. This applies for all V
C CIO
settings (3.3, 2.5,
1.8, and 1.5 V).
(3) V
I
= ground, no load, no toggling inputs.
(4) Commercial temperature ranges from 0°C to 85°C with maximum current at 85°C.
(5) Industrial temperature ranges from –40°C to 100°C with maximum current at 100°C.
(6) This value applies to commercial and industrial range devices. For extended temperature range devices, the V
S CHM ITT
typical value is
300 mV for V
CC IO
= 3.3 V and 120 mV for V
C CIO
= 2.5 V.
(7) The
TCK
input is susceptible to high pulse glitches when the input signal fall time is greater than 200 ns for all I/O standards.
(8) This is a peak current value with a maximum duration of t
CONFIG
time.
(9) Pin pull-up resistance values will lower if an external source drives the pin higher than V
C CIO
.