5–20
Chapter 5: DC and Switching Characteristics
Timing Model and Specifications
Table 5–24. EPM570 Global Clock External I/O Timing Parameters (Part 2 of 2)
MAX II / MAX IIG
MAX IIZ
–3 Speed
Grade
–4 Speed
Grade
–5 Speed
Grade
–6 Speed
Grade
–7 Speed
Grade
–8 Speed
Grade
Symbol
Parameter
Condition Min Max Min Max Min Max Min Max Min Max Min Max Unit
fCNT
Maximum
—
—
304.0
(1)
—
247.5
—
201.1
—
184.1
—
123.5
—
118.3 MHz
global clock
frequency for
16-bit counter
Note to Table 5–24:
(1) The maximum frequency is limited by the I/O standard on the clock input pin. The 16-bit counter critical delay performs faster than this global clock input
pin maximum frequency.
Table 5–25 shows the external I/O timing parameters for EPM1270 devices.
Table 5–25. EPM1270 Global Clock External I/O Timing Parameters
MAX II / MAX IIG
–3 Speed Grade
–4 Speed Grade –5 Speed Grade
Symbol
tPD1
Parameter
Condition
Min
Max
Min
Max
Min
Max
Unit
Worst case pin-to-pin
delay through 1 look-up
table (LUT)
10 pF
—
6.2
—
8.1
—
10.0
ns
tPD2
Best case pin-to-pin
delay through 1 LUT
10 pF
—
3.7
—
4.8
—
5.9
ns
tSU
tH
Global clock setup time
Global clock hold time
—
—
1.2
0
—
—
1.5
0
—
—
1.9
0
—
—
ns
ns
ns
tCO
Global clock to output
delay
10 pF
2.0
4.6
2.0
5.9
2.0
7.3
tCH
tCL
Global clock high time
Global clock low time
—
—
—
166
166
3.3
—
—
—
216
216
4.0
—
—
—
266
266
5.0
—
—
—
ps
ps
ns
tCNT
Minimum global clock
period for
16-bit counter
fCNT
Maximum global clock
frequency for 16-bit
counter
—
—
304.0 (1)
—
247.5
—
201.1
MHz
Note to Table 5–25:
(1) The maximum frequency is limited by the I/O standard on the clock input pin. The 16-bit counter critical delay performs faster than this global
clock input pin maximum frequency.
MAX II Device Handbook
© August 2009 Altera Corporation
INTEL [ INTEL ]
