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EPF10K30RC208-3N 参数 Datasheet PDF下载

EPF10K30RC208-3N图片预览
型号: EPF10K30RC208-3N
PDF下载: 下载PDF文件 查看货源
内容描述: [Loadable PLD, 0.6ns, CMOS, PQFP208, RQFP-208]
分类和应用: 时钟输入元件可编程逻辑
文件页数/大小: 143 页 / 1990 K
品牌: INTEL [ INTEL CORPORATION ]
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FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Figure 1. FLEX 10K Device Block Diagram
Embedded Array Block (EAB)
I/O Element
(IOE)
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
Column
Interconnect
Logic Array
EAB
Logic Array
Block (LAB)
IOE
IOE
IOE
IOE
Logic Element (LE)
Row
Interconnect
EAB
Local Interconnect
Logic
Array
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
Embedded Array
FLEX 10K devices provide six dedicated inputs that drive the flipflops’
control inputs to ensure the efficient distribution of high-speed, low-skew
(less than 1.5 ns) control signals. These signals use dedicated routing
channels that provide shorter delays and lower skews than the FastTrack
Interconnect. Four of the dedicated inputs drive four global signals. These
four global signals can also be driven by internal logic, providing an ideal
solution for a clock divider or an internally generated asynchronous clear
signal that clears many registers in the device.
Embedded Array Block
The EAB is a flexible block of RAM with registers on the input and output
ports, and is used to implement common gate array megafunctions. The
EAB is also suitable for functions such as multipliers, vector scalars, and
error correction circuits, because it is large and flexible. These functions
can be combined in applications such as digital filters and
microcontrollers.
Altera Corporation
9