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EP3C16U256C6 参数 Datasheet PDF下载

EP3C16U256C6图片预览
型号: EP3C16U256C6
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 15408 CLBs, 472.5MHz, 15408-Cell, CMOS, PBGA256, 14 X 14 MM, 2.20 MM HEIGHT, 0.80 MM PITCH, UFBGA-256]
分类和应用: 时钟可编程逻辑
文件页数/大小: 34 页 / 836 K
品牌: INTEL [ INTEL ]
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1–6  
Chapter 1: Cyclone III Device Datasheet  
Electrical Characteristics  
(1)  
Table 1–5. Cyclone III Devices Bus Hold Parameter (Part 2 of 2)  
V
CCIO (V)  
Parameter  
Condition  
1.2  
1.5  
1.8  
2.5  
3.0  
3.3  
Unit  
Min Max Min  
Max Min Max Min Max Min Max Min Max  
Bus-hold  
low,  
overdrive  
current  
0 V < VIN < VCCIO  
125  
175  
200  
300  
500  
500  
A  
Bus-hold  
high,  
overdrive  
current  
0 V < VIN < VCCIO  
–125  
–175  
–200  
–300  
1.7  
–500  
2
–500 A  
Bus-holdtrip  
point  
0.3  
0.9 0.375 1.125 0.68 1.07 0.7  
0.8  
0.8  
2
V
Note to Table 1–5:  
(1) The bus-hold trip points are based on calculated input voltages from the JEDEC standard.  
OCT Specifications  
Table 1–6 lists the variation of OCT without calibration across process, temperature,  
and voltage.  
Table 1–6. Cyclone III Devices Series OCT without Calibration Specifications  
Resistance Tolerance  
Description  
V
CCIO (V)  
Unit  
Commercial  
Max  
Industrial and Automotive  
Max  
3.0  
2.5  
1.8  
1.5  
1.2  
30  
30  
40  
40  
50  
50  
50  
%
%
%
%
%
Series OCT without  
calibration  
+40  
+50  
+50  
OCT calibration is automatically performed at device power-up for OCT enabled  
I/Os.  
Table 1–7 lists the OCT calibration accuracy at device power-up.  
Table 1–7. Cyclone III Devices Series OCT with Calibration at Device Power-Up Specifications  
Calibration Accuracy  
Description  
VCCIO (V)  
Unit  
Industrial and Automotive  
Max  
Commercial Max  
3.0  
2.5  
1.8  
1.5  
1.2  
10  
10  
10  
10  
10  
10  
10  
10  
10  
10  
%
%
%
%
%
Series OCT with  
calibration at device  
power-up  
Cyclone III Device Handbook  
Volume 2  
July 2012 Altera Corporation